[PATCH 19/32] drm/amd/display: Extend PSRSU residency mode
Zaeem Mohamed
zaeem.mohamed at amd.com
Fri May 31 16:51:32 UTC 2024
From: Jack Chang <jack.chang at amd.com>
1. To support multiple PSRSU residency measurement mode
Reviewed-by: Wenjing Liu <wenjing.liu at amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed at amd.com>
Signed-off-by: Jack Chang <jack.chang at amd.com>
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 5 ++++-
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h | 3 ++-
drivers/gpu/drm/amd/display/dc/inc/link.h | 2 +-
.../dc/link/protocols/link_edp_panel_control.c | 4 ++--
.../dc/link/protocols/link_edp_panel_control.h | 2 +-
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 12 ++++++++++++
7 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index 27d5c6077630..8db75afa9fc9 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -3074,7 +3074,7 @@ static int psr_read_residency(void *data, u64 *val)
struct dc_link *link = connector->dc_link;
u32 residency = 0;
- link->dc->link_srv->edp_get_psr_residency(link, &residency);
+ link->dc->link_srv->edp_get_psr_residency(link, &residency, PSR_RESIDENCY_MODE_PHY);
*val = (u64)residency;
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
index 3e243e407bb8..ccf153b7a467 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
@@ -445,10 +445,13 @@ static void dmub_psr_force_static(struct dmub_psr *dmub, uint8_t panel_inst)
/*
* Get PSR residency from firmware.
*/
-static void dmub_psr_get_residency(struct dmub_psr *dmub, uint32_t *residency, uint8_t panel_inst)
+static void dmub_psr_get_residency(struct dmub_psr *dmub, uint32_t *residency,
+ uint8_t panel_inst, enum psr_residency_mode mode)
{
uint16_t param = (uint16_t)(panel_inst << 8);
+ param |= mode;
+
/* Send gpint command and wait for ack */
dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__PSR_RESIDENCY, param, residency,
DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY);
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
index 289e42070ece..a6e282d950c3 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h
@@ -27,6 +27,7 @@
#define _DMUB_PSR_H_
#include "dc_types.h"
+#include "dmub_cmd.h"
struct dc_link;
struct dmub_psr_funcs;
@@ -46,7 +47,7 @@ struct dmub_psr_funcs {
uint8_t panel_inst);
void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);
void (*psr_get_residency)(struct dmub_psr *dmub, uint32_t *residency,
- uint8_t panel_inst);
+ uint8_t panel_inst, enum psr_residency_mode mode);
void (*psr_set_sink_vtotal_in_psr_active)(struct dmub_psr *dmub,
uint16_t psr_vtotal_idle, uint16_t psr_vtotal_su);
void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst);
diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h b/drivers/gpu/drm/amd/display/dc/inc/link.h
index 7ab8ba5e23ed..72a8479e1f2d 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/link.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/link.h
@@ -272,7 +272,7 @@ struct link_service {
uint16_t psr_vtotal_idle,
uint16_t psr_vtotal_su);
void (*edp_get_psr_residency)(
- const struct dc_link *link, uint32_t *residency);
+ const struct dc_link *link, uint32_t *residency, enum psr_residency_mode mode);
bool (*edp_get_replay_state)(
const struct dc_link *link, uint64_t *state);
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
index 89f66d88c3b0..b0e17064a960 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
@@ -853,7 +853,7 @@ bool edp_setup_psr(struct dc_link *link,
}
-void edp_get_psr_residency(const struct dc_link *link, uint32_t *residency)
+void edp_get_psr_residency(const struct dc_link *link, uint32_t *residency, enum psr_residency_mode mode)
{
struct dc *dc = link->ctx->dc;
struct dmub_psr *psr = dc->res_pool->psr;
@@ -864,7 +864,7 @@ void edp_get_psr_residency(const struct dc_link *link, uint32_t *residency)
// PSR residency measurements only supported on DMCUB
if (psr != NULL && link->psr_settings.psr_feature_enabled)
- psr->funcs->psr_get_residency(psr, residency, panel_inst);
+ psr->funcs->psr_get_residency(psr, residency, panel_inst, mode);
else
*residency = 0;
}
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
index cb6d95cc36e4..8df8ac5bde5b 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h
@@ -51,7 +51,7 @@ bool edp_setup_psr(struct dc_link *link,
struct psr_context *psr_context);
bool edp_set_sink_vtotal_in_psr_active(const struct dc_link *link,
uint16_t psr_vtotal_idle, uint16_t psr_vtotal_su);
-void edp_get_psr_residency(const struct dc_link *link, uint32_t *residency);
+void edp_get_psr_residency(const struct dc_link *link, uint32_t *residency, enum psr_residency_mode mode);
bool edp_set_replay_allow_active(struct dc_link *dc_link, const bool *enable,
bool wait, bool force_static, const unsigned int *power_opts);
bool edp_setup_replay(struct dc_link *link,
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 7f08e95140ef..d4d046ac82a4 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -3249,6 +3249,18 @@ struct dmub_rb_cmd_psr_set_power_opt {
struct dmub_cmd_psr_set_power_opt_data psr_set_power_opt_data;
};
+/**
+ * Different PSR residency modes.
+ * Different modes change the definition of PSR residency.
+ */
+enum psr_residency_mode {
+ PSR_RESIDENCY_MODE_PHY = 0,
+ PSR_RESIDENCY_MODE_ALPM,
+ PSR_RESIDENCY_MODE_ENABLEMENT_PERIOD,
+ /* Do not add below. */
+ PSR_RESIDENCY_MODE_LAST_ELEMENT,
+};
+
/**
* Definition of Replay Residency GPINT command.
* Bit[0] - Residency mode for Revision 0
--
2.34.1
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