[PATCH 1/4] drm/amdgpu: Add helpers to set/get unique ids

Kamal, Asad Asad.Kamal at amd.com
Tue Aug 5 08:28:54 UTC 2025


[AMD Official Use Only - AMD Internal Distribution Only]

Series is
Reviewed-by: Asad Kamal <asad.kamal at amd.com>

Thanks & Regards
Asad

-----Original Message-----
From: Lazar, Lijo <Lijo.Lazar at amd.com>
Sent: Monday, August 4, 2025 5:28 PM
To: amd-gfx at lists.freedesktop.org
Cc: Zhang, Hawking <Hawking.Zhang at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Kamal, Asad <Asad.Kamal at amd.com>; Huang, JinHuiEric <JinHuiEric.Huang at amd.com>
Subject: [PATCH 1/4] drm/amdgpu: Add helpers to set/get unique ids

Add a struct to store unique id information for each type. Add helper to fetch the unique id.

Signed-off-by: Lijo Lazar <lijo.lazar at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 20 ++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 71 ++++++++++++++++++++++
 2 files changed, 91 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ef3af170dda4..c2771e32d0bf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -819,6 +819,20 @@ struct amdgpu_ip_map_info {
                                        uint32_t mask);
 };

+enum amdgpu_uid_type {
+       AMDGPU_UID_TYPE_XCD,
+       AMDGPU_UID_TYPE_AID,
+       AMDGPU_UID_TYPE_SOC,
+       AMDGPU_UID_TYPE_MAX
+};
+
+#define AMDGPU_UID_INST_MAX 8 /* max number of instances for each UID
+type */
+
+struct amdgpu_uid {
+       uint64_t uid[AMDGPU_UID_TYPE_MAX][AMDGPU_UID_INST_MAX];
+       struct amdgpu_device *adev;
+};
+
 struct amd_powerplay {
        void *pp_handle;
        const struct amd_pm_funcs *pp_funcs;
@@ -1302,6 +1316,7 @@ struct amdgpu_device {
        struct list_head                userq_mgr_list;
        struct mutex                    userq_mutex;
        bool                            userq_halt_for_enforce_isolation;
+       struct amdgpu_uid *uid_info;
 };

 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev, @@ -1785,4 +1800,9 @@ static inline int amdgpu_device_bus_status_check(struct amdgpu_device *adev)
        return 0;
 }

+void amdgpu_device_set_uid(struct amdgpu_uid *uid_info,
+                          enum amdgpu_uid_type type, uint8_t inst,
+                          uint64_t uid);
+uint64_t amdgpu_device_get_uid(struct amdgpu_uid *uid_info,
+                              enum amdgpu_uid_type type, uint8_t inst);
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 370c8daada8c..9eee1d4e1eaa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2675,6 +2675,24 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
        return err;
 }

+static void amdgpu_uid_init(struct amdgpu_device *adev) {
+       /* Initialize the UID for the device */
+       adev->uid_info = kzalloc(sizeof(struct amdgpu_uid), GFP_KERNEL);
+       if (!adev->uid_info) {
+               dev_warn(adev->dev, "Failed to allocate memory for UID\n");
+               return;
+       }
+       adev->uid_info->adev = adev;
+}
+
+static void amdgpu_uid_fini(struct amdgpu_device *adev) {
+       /* Free the UID memory */
+       kfree(adev->uid_info);
+       adev->uid_info = NULL;
+}
+
 /**
  * amdgpu_device_ip_early_init - run early init for hardware IPs
  *
@@ -2858,6 +2876,8 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
        if (adev->gmc.xgmi.supported)
                amdgpu_xgmi_early_init(adev);

+       if (amdgpu_is_multi_aid(adev))
+               amdgpu_uid_init(adev);
        ip_block = amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_GFX);
        if (ip_block->status.valid != false)
                amdgpu_amdkfd_device_probe(adev);
@@ -3648,6 +3668,7 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
        }

        amdgpu_ras_fini(adev);
+       amdgpu_uid_fini(adev);

        return 0;
 }
@@ -7467,3 +7488,53 @@ ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset)
        size += sysfs_emit_at(buf, size, "\n");
        return size;
 }
+
+void amdgpu_device_set_uid(struct amdgpu_uid *uid_info,
+                          enum amdgpu_uid_type type, uint8_t inst,
+                          uint64_t uid)
+{
+       if (!uid_info)
+               return;
+
+       if (type >= AMDGPU_UID_TYPE_MAX) {
+               dev_err_once(uid_info->adev->dev, "Invalid UID type %d\n",
+                            type);
+               return;
+       }
+
+       if (inst >= AMDGPU_UID_INST_MAX) {
+               dev_err_once(uid_info->adev->dev, "Invalid UID instance %d\n",
+                            inst);
+               return;
+       }
+
+       if (uid_info->uid[type][inst] != 0) {
+               dev_warn_once(
+                       uid_info->adev->dev,
+                       "Overwriting existing UID %llu for type %d instance %d\n",
+                       uid_info->uid[type][inst], type, inst);
+       }
+
+       uid_info->uid[type][inst] = uid;
+}
+
+u64 amdgpu_device_get_uid(struct amdgpu_uid *uid_info,
+                         enum amdgpu_uid_type type, uint8_t inst) {
+       if (!uid_info)
+               return 0;
+
+       if (type >= AMDGPU_UID_TYPE_MAX) {
+               dev_err_once(uid_info->adev->dev, "Invalid UID type %d\n",
+                            type);
+               return 0;
+       }
+
+       if (inst >= AMDGPU_UID_INST_MAX) {
+               dev_err_once(uid_info->adev->dev, "Invalid UID instance %d\n",
+                            inst);
+               return 0;
+       }
+
+       return uid_info->uid[type][inst];
+}
\ No newline at end of file
--
2.49.0



More information about the amd-gfx mailing list