[PATCH 0/6] SI power management fixes

[Timur Kristóf]

This series fixes some power management issues on SI.
Where applicable, a radeon backport is also included.
I recommend backporting these commits to the stable kernel.

1. Ensure that DPM powers on the UVD for FW validation.
This is necessary because SI needs to use a specific power
state for UVD to work correctly, which we forgot to use
for FW validation.

2. Disable ULV mode even if unsupported (+ radeon backport).
Send the PPSMC_MSG_DisableULV message to the SMC even when ULV
mode is not supported, to ensure that ULV mode is actually
turned off. This fixes some instability on Tahiti.

3. Fix si_upload_smc_data (+ radeon backport).
The si_write_smc_soft_register return value is actually zero on
success, fix checking it. This fixes an SMC hang on Tahiti.

4. Fix issues with high pixel clock displays
As we don't have something like dce_calcs for old GPUs, sadly
we have to apply ad-hoc fixes. This fixes different flickering
issues that I observed on Oland, Tahiti and Pitcairn.

Timur Kristóf (6):
  drm/amdgpu: Power up UVD 3 for FW validation
  drm/amd/pm: Disable ULV even if unsupported
  drm/radeon: Disable ULV even if unsupported
  drm/amd/pm: Fix si_upload_smc_data
  drm/radeon: Fix si_upload_smc_data
  drm/amd/pm: Fix SI DPM issues with high pixel clock

 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c      |  9 ++-
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 75 ++++++++++++++++++----
 drivers/gpu/drm/radeon/si_dpm.c            | 38 +++++++----
 3 files changed, 91 insertions(+), 31 deletions(-)

-- 
2.50.1