[PATCH 3/3] drm/amd/display: Don't use non-registered VUPDATE on DCE 6

[Timur Kristóf]

Alex Deucher <alexdeucher at gmail.com> ezt írta (időpont: 2025. aug. 18., Hét
22:30):

> On Mon, Aug 18, 2025 at 4:11 PM Alex Hung <alex.hung at amd.com> wrote:
> >
> >
> >
> > On 8/2/25 10:06, Timur Kristóf wrote:
> > > The VUPDATE interrupt isn't registered on DCE 6, so don't try
> > > to use that.
> > >
> > > This fixes a page flip timeout after sleep/resume on DCE 6.
> > >
> > > Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
> > > ---
> > >   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22
> ++++++++++++-------
> > >   .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c    | 16 ++++++++------
> > >   2 files changed, 23 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > > index 470f831a17f7..e8d2ba58cbfa 100644
> > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > > @@ -2981,14 +2981,20 @@ static void
> dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,
> > >                               drm_warn(adev_to_drm(adev), "Failed to
> %s pflip interrupts\n",
> > >                                        enable ? "enable" : "disable");
> > >
> > > -                     if (enable) {
> > > -                             if
> (amdgpu_dm_crtc_vrr_active(to_dm_crtc_state(acrtc->base.state)))
> > > -                                     rc =
> amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, true);
> > > -                     } else
> > > -                             rc =
> amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, false);
> > > -
> > > -                     if (rc)
> > > -                             drm_warn(adev_to_drm(adev), "Failed to
> %sable vupdate interrupt\n", enable ? "en" : "dis");
> > > +                     if
> (dc_supports_vrr(adev->dm.dc->ctx->dce_version)) {
> > > +                             if (enable) {
> > > +                                     if (amdgpu_dm_crtc_vrr_active(
> > > +
>  to_dm_crtc_state(acrtc->base.state)))
> > > +                                             rc =
> amdgpu_dm_crtc_set_vupdate_irq(
> > > +                                                     &acrtc->base,
> true);
> > > +                             } else
> > > +                                     rc =
> amdgpu_dm_crtc_set_vupdate_irq(
> > > +                                                     &acrtc->base,
> false);
> > > +
> > > +                             if (rc)
> > > +                                     drm_warn(adev_to_drm(adev),
> "Failed to %sable vupdate interrupt\n",
> > > +                                             enable ? "en" : "dis");
> > > +                     }
> >
> > Hi Timur,
> >
> > There seem to be conflicts to amd-staging-drm-next. Could you please
> > rebase and resend? This helps make sure new change fix the problem you
> > observed.
> >
> > Really appreciate it. Thanks.
>
> If it's just the first patch, you can skip that one as the conflict
> solves the issue with DSC.
>
> Alex
>

Hi Alex,

This is a different series, not the same one that had the patch for the DSC
crash. I can send a rebased version tomorrow.

Additionally, I have one more patch that solves another case of page flip
timeout on DCE 6, I will add that to the next version of the series too if
that's okay.

Thanks,
Timur



> >
> > >
> > >                       irq_source = IRQ_TYPE_VBLANK + acrtc->otg_inst;
> > >                       /* During gpu-reset we disable and then enable
> vblank irq, so
> > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> > > index 2551823382f8..f2208e4224f9 100644
> > > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> > > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
> > > @@ -298,13 +298,15 @@ static inline int
> amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable)
> > >
> > >       irq_type = amdgpu_display_crtc_idx_to_irq_type(adev,
> acrtc->crtc_id);
> > >
> > > -     if (enable) {
> > > -             /* vblank irq on -> Only need vupdate irq in vrr mode */
> > > -             if (amdgpu_dm_crtc_vrr_active(acrtc_state))
> > > -                     rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);
> > > -     } else {
> > > -             /* vblank irq off -> vupdate irq off */
> > > -             rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);
> > > +     if (dc_supports_vrr(dm->dc->ctx->dce_version)) {
> > > +             if (enable) {
> > > +                     /* vblank irq on -> Only need vupdate irq in vrr
> mode */
> > > +                     if (amdgpu_dm_crtc_vrr_active(acrtc_state))
> > > +                             rc =
> amdgpu_dm_crtc_set_vupdate_irq(crtc, true);
> > > +             } else {
> > > +                     /* vblank irq off -> vupdate irq off */
> > > +                     rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);
> > > +             }
> > >       }
> > >
> > >       if (rc)
> >
>
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