[PATCH 3/4] drm/amd/display: Uses optc31_disable_crtc for DCN35
Rodrigo Siqueira
siqueira at igalia.com
Sun May 4 22:11:30 UTC 2025
The optc35_disable_crtc() function is a copy & paste from
optc31_disable_crtc. This commit removes the duplication in favor of
using optc31_disable_crtc.
Signed-off-by: Rodrigo Siqueira <siqueira at igalia.com>
---
.../amd/display/dc/optc/dcn35/dcn35_optc.c | 35 +------------------
1 file changed, 1 insertion(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
index 5835aa6c3c18..ec12aead3ced 100644
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
@@ -109,39 +109,6 @@ static void optc35_set_odm_combine(struct timing_generator *optc, int *opp_id, i
optc1->opp_count = opp_cnt;
}
-/* disable_crtc */
-static bool optc35_disable_crtc(struct timing_generator *optc)
-{
- struct optc *optc1 = DCN10TG_FROM_TG(optc);
-
- REG_UPDATE_5(OPTC_DATA_SOURCE_SELECT,
- OPTC_SEG0_SRC_SEL, 0xf,
- OPTC_SEG1_SRC_SEL, 0xf,
- OPTC_SEG2_SRC_SEL, 0xf,
- OPTC_SEG3_SRC_SEL, 0xf,
- OPTC_NUM_OF_INPUT_SEGMENT, 0);
-
- REG_UPDATE(OPTC_MEMORY_CONFIG,
- OPTC_MEM_SEL, 0);
-
- /* disable otg request until end of the first line
- * in the vertical blank region
- */
- REG_UPDATE(OTG_CONTROL,
- OTG_MASTER_EN, 0);
-
- REG_UPDATE(CONTROL,
- VTG0_ENABLE, 0);
-
- /* CRTC disabled, so disable clock. */
- REG_WAIT(OTG_CLOCK_CONTROL,
- OTG_BUSY, 0,
- 1, 100000);
- optc1_clear_optc_underflow(optc);
-
- return true;
-}
-
static void optc35_phantom_crtc_post_enable(struct timing_generator *optc)
{
struct optc *optc1 = DCN10TG_FROM_TG(optc);
@@ -411,7 +378,7 @@ static struct timing_generator_funcs dcn35_tg_funcs = {
.setup_vertical_interrupt2 = optc1_setup_vertical_interrupt2,
.program_global_sync = optc1_program_global_sync,
.enable_crtc = optc31_enable_crtc,
- .disable_crtc = optc35_disable_crtc,
+ .disable_crtc = optc31_disable_crtc,
.immediate_disable_crtc = optc31_immediate_disable_crtc,
.phantom_crtc_post_enable = optc35_phantom_crtc_post_enable,
/* used by enable_timing_synchronization. Not need for FPGA */
--
2.47.2
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