[Beignet] [PATCH] CL/Driver: enable atomics in L3 for HSW.

[Zhigang Gong]

On Wed, Dec 31, 2014 at 11:57:53AM +0800, Zhenyu Wang wrote:
> On 2014.12.31 03:41:02 +0000, Gong, Zhigang wrote:
> > > commit f3fc4884ebe6ae649d3723be14b219230d3b7fd2
> > > Author: Francisco Jerez <currojerez at riseup.net>
> > > Date:   Wed Oct 2 15:53:16 2013 -0700
> > > 
> > >     drm/i915/hsw: Disable L3 caching of atomic memory operations.
> > > 
> > >     Otherwise using any atomic memory operation will lock up the GPU due
> > >     to a Haswell hardware bug.
> > > 
> > > Maybe this issue affects some HSW stepping, should just fix the kernel.
> > 
> > That should be a hardware bug for the version earlier than stepping D.
> > And I think this should not be a real problem now, as all HSW we can get
> > from public channel is at least stepping D or newer. I will submit a kernel
> > patch latter. Before that patch has been accepted by kernel, I would rather
> > to push this patch to beignet. As some application will affected heavily by
> > this issue, such as the darktable's splat kernel. The splat kernel uses many
> > atomic operations, and may take 50 seconds on one image, but with this patch
> > it just takes less than 1 second.
> > 
> > Any thoughts?
> > 
> 
> Even if you have this hack in beignet now, you will revert
> that anyway in future when upstream cmd parser is ready for Gen7.
> As if this load exists in your exec submit, kernel cmd parser might
> catch and discard your whole batch.

As you know, we have been waiting for the cmd parser to satisfy our requirement
for L3 configuration on HSW for really a very long time. With unmodified kernel,
beignet is simply broken on HSW. IMO, this hack is not worse than any of the other
existing hacks (L3 related code). And you are right, all of this hacks need to
be reworked or reverted when we get proper cmd parser support in the future.
But we don't know when will that become ready, and we just want to provide a
working beignet on HSW before that.

> 
> For kernel patch, if you know exactly it's D stepping issue, so
> just apply the quirk for anything before it, but enable for other
> sane HSW, which is the most safe I think.
Right, I will do that latter.

> 
> If let me choose, I'd rather provide a side kernel patch for this
> performance issue instead of hack it up in beignet.

Right, a side kernel patch is a possible alternative. But I still insist
to have this patch in beignet based on the following reason:

Some users already applied the secure batch buffer disable patch on
HSW, they don't need to patch and rebuild the kernel again. Some distros
even already released the patched binary kernel package. We just don't want
they to provide another version binary patched kernel package.

Thanks,
Zhigang Gong.

> 
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