[Beignet] [PATCH] Add the missing LOAD_INT64_IMM virtual function for GEN8.

Zhigang Gong zhigang.gong at linux.intel.com
Wed Jan 21 15:56:46 PST 2015


LGTM, pushed, thanks.

On Wed, Jan 21, 2015 at 03:51:26PM +0800, junyan.he at inbox.com wrote:
> From: Junyan He <junyan.he at linux.intel.com>
> 
> Signed-off-by: Junyan He <junyan.he at linux.intel.com>
> ---
>  backend/src/backend/gen8_encoder.cpp | 4 ++++
>  backend/src/backend/gen8_encoder.hpp | 1 +
>  2 files changed, 5 insertions(+)
> 
> diff --git a/backend/src/backend/gen8_encoder.cpp b/backend/src/backend/gen8_encoder.cpp
> index 45f3d3e..92aad64 100644
> --- a/backend/src/backend/gen8_encoder.cpp
> +++ b/backend/src/backend/gen8_encoder.cpp
> @@ -219,6 +219,10 @@ namespace gbe
>      pop();
>    }
>  
> +  void Gen8Encoder::LOAD_INT64_IMM(GenRegister dest, GenRegister value) {
> +    MOV(dest, value);
> +  }
> +
>    void Gen8Encoder::MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp) {
>      GBE_ASSERT((src0.type == GEN_TYPE_F && dest.isdf()) || (src0.isdf() && dest.type == GEN_TYPE_F));
>      GenRegister r = GenRegister::retype(tmp, GEN_TYPE_F);
> diff --git a/backend/src/backend/gen8_encoder.hpp b/backend/src/backend/gen8_encoder.hpp
> index f9200cd..4c5e556 100644
> --- a/backend/src/backend/gen8_encoder.hpp
> +++ b/backend/src/backend/gen8_encoder.hpp
> @@ -48,6 +48,7 @@ namespace gbe
>      virtual void F32TO16(GenRegister dest, GenRegister src0);
>      virtual void MOV_DF(GenRegister dest, GenRegister src0, GenRegister tmp = GenRegister::null());
>      virtual void LOAD_DF_IMM(GenRegister dest, GenRegister tmp, double value);
> +    virtual void LOAD_INT64_IMM(GenRegister dest, GenRegister value);
>      virtual void ATOMIC(GenRegister dst, uint32_t function, GenRegister src, uint32_t bti, uint32_t srcNum);
>      virtual void UNTYPED_READ(GenRegister dst, GenRegister src, uint32_t bti, uint32_t elemNum);
>      virtual void UNTYPED_WRITE(GenRegister src, uint32_t bti, uint32_t elemNum);
> -- 
> 1.9.1
> 
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