[Beignet] [PATCH] add render cache data port disassembly info.

[Yang, Rong R]

LGTM, thanks.

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> xionghu.luo at intel.com
> Sent: Tuesday, April 14, 2015 16:32
> To: beignet at lists.freedesktop.org
> Cc: Luo, Xionghu
> Subject: [Beignet] [PATCH] add render cache data port disassembly info.
> 
> From: Luo Xionghu <xionghu.luo at intel.com>
> 
> the image related disassembly message is "unsupported" before.
> 
> Signed-off-by: Luo Xionghu <xionghu.luo at intel.com>
> ---
>  backend/src/backend/gen/gen_mesa_disasm.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/backend/src/backend/gen/gen_mesa_disasm.c
> b/backend/src/backend/gen/gen_mesa_disasm.c
> index 711b943..ed947a1 100644
> --- a/backend/src/backend/gen/gen_mesa_disasm.c
> +++ b/backend/src/backend/gen/gen_mesa_disasm.c
> @@ -449,6 +449,16 @@ static const char
> *data_port1_data_cache_msg_type[] = {
>    [13] = "Typed Surface Write",
>  };
> 
> +static const char *data_port_render_cache_msg_type[] = {
> +  [4] = "Media Block Read",
> +  [5] = "Typed Surface Read",
> +  [6] = "Typed Atomic Operation",
> +  [7] = "Memory Fence",
> +  [10] = "Media Block Write",
> +  [12] = "Render Target Write",
> +  [13] = "Typed Surface Write",
> +};
> +
>  static int column;
> 
>  static int gen_version;
> @@ -1294,6 +1304,13 @@ int gen_disasm (FILE *file, const void *inst,
> uint32_t deviceID, uint32_t compac
>                 MSG_GW_ACKREQ(inst));
>          break;
> 
> +      case GEN_SFID_DATAPORT_RENDER:
> +        format(file, " (bti: %d, rgba: %d, %s)",
> +               UNTYPED_RW_BTI(inst),
> +               UNTYPED_RW_RGBA(inst),
> +
> data_port_render_cache_msg_type[UNTYPED_RW_MSG_TYPE(inst)]);
> +        break;
> +
>        default:
>          format(file, "unsupported target %d", target);
>          break;
> --
> 1.9.1
> 
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