[Beignet] [PATCH 3/4] Backend: Fix register mov issue for IVB
grigore.lupescu at intel.com
grigore.lupescu at intel.com
Wed Mar 9 13:02:05 UTC 2016
From: Grigore Lupescu <grigore.lupescu at intel.com>
---
backend/src/backend/gen_context.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index 4b57634..6ad5977 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -3032,6 +3032,7 @@ do { \
/* Do some calculation within each thread */
workgroupOpInThread(msg, theVal, threadData, tmp, simd, wg_op, p);
+ threadData = GenRegister::toUniform(threadData, dst.type);
/* Store thread count for future use on read/write to SLM */
GenRegister threadN = GenRegister::retype(tmp, GEN_TYPE_UD);
--
2.5.0
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