[Bug 48880] Set mode has different timings than requested on VGA

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Thu Apr 19 08:20:03 PDT 2012


--- Comment #24 from Alex Deucher <agd5f at yahoo.com> 2012-04-19 08:20:03 PDT ---
(In reply to comment #23)
> The trick is testing a given version of the chip to the death and finding the
> frequency limits of the inner loop of the pll. I have always managed to fully
> clamp down pll ranges with a halfway decent CRT. It does take time and a
> structured approach though.

Even then you still hit problematic monitors.  CRTs are usually pretty
forgiving; it's usually digital monitors that have problems.

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