[Bug 64193] LLVM RV670 regression since R600: Packetize instructions

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=64193

--- Comment #10 from Vadim Girlin <ptpzz at yandex.ru> ---
I looked a bit more into it and AFAICS it's not just a single wrong bit, looks
like r700 alu encoding is used for all r600  chips with llvm backend
currently(In reply to comment #9)
> As mentioned by Vadim on IRC:
> it seems many instructions in bytecode generated for RS880 have (incorrect)
> OMOD = 2, that is, ALU WORD1 bit 7 is set where it shouldn't be set

I looked a bit more into it and AFAICS it's not just a single wrong bit, looks
like r700 alu encoding is used for all r600 chips with llvm backend currently

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