[Bug 75276] Implement VGPR Register Spilling

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=75276

--- Comment #30 from Christoph Haag <haagch at frickel.club> ---
(In reply to comment #28)
> > LLVM ERROR: ran out of registers during register allocation

I do not get this message on upstream llvm recent revisions.

But every demo segfaults. Mostly in LLVMBuildBitCast().

Running a demo looks like this:


$ DRI_PRIME=1 ./Effects
Using binned.
4.3.0-0+UE4 7038 3077 379 0
Signal 11 caught.
EngineCrashHandler: Signal=11


Exiting due to error
Starting ../../../Engine/Binaries/Linux/CrashReportClient
[1]    10932 abort (core dumped)  DRI_PRIME=1 ./Effects


This is still a problem with register spilling that just looks different,
right?
Should I compile with debug symbols and get a complete backtrace or wouldn't
that provide any new information?


(By the way, applying this small patch makes it render almost completely
correct on intel: https://bugs.freedesktop.org/show_bug.cgi?id=78716#c10)

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