[PATCH v2 1/2] drm/mipi-dsi: add (LPM) Low Power Mode transfer support

Inki Dae inki.dae at samsung.com
Mon Jul 28 20:30:15 PDT 2014


On 2014년 07월 29일 01:09, Andrzej Hajda wrote:
> On 07/28/2014 04:00 AM, Inki Dae wrote:
>> This patch adds below two flags for LPM transfer, and it attaches LPM flags
>> to a msg in accordance with master's mode_flags set by LCD Panel driver.
>>
>> MIPI_DSI_MODE_CMD_LPM
>> - If this flag is set by Panel driver, MIPI-DSI controller will tranfer
>> command data to Panel device in Low Power Mode.
> 
> What do you mean by command data? It could be:
> - all transfer in command mode of operations,
> - transfer initialized by the driver by writing to DSIM registers.
> 
>>
>> MIPI_DSI_MODE_VIDEO_LPM
>> - If this flag is set by Panel driver, MIPI-DSI controller will tranfer
>> image data to Panel device in Low Power Mode.
> 
> What is the meaning of this flag in case of command mode of operation?
> 
> Maybe it would be better to create flags based on source of data/FIFOs:
> - commands send by SFR registers,
> - commands generated from data sent from Display Controller.
> 

I wrote the descriptions in host controller point of view: with
MIPI_DSI_MODE_CMD_LPM, host controller will set the operation mode to
command mode operation and transfer command data to Panel (MIPI DSI
client), and with MIPI_DSI_MODE_VIDEO_LPM, host controller will set the
operation mode to video mode and transfer video data (pixel stream) to
Panel.

However, it seems that these descriptions aren't enough. So make sure
the meanings.

MIPI-DSI has two operation modes, Command and Video mode. And MIPI-DSI
spec says, "Command Mode refers to operation in which transactions
primarily take the form of sending commands and data to a peripheral,
such as a display module, that incorporates a display controller. The
display controller may include local registers and a frame buffer.
Systems using Command Mode write to, and read from, the registers and
frame buffer memory. The host processor indirectly controls activity at
the peripheral by sending commands, parameters and data to the display
controller. The host processor can also read display module status
information or the contents of the frame memory. Command Mode operation
requires a bidirectional interface.".

And also the spec says for Video mode, "Video mode Mode refers to
operation in which transfers from the host processor to the peripheral
take the form of a real-time pixel stream. In normal operation, the
display module relies on the host processor to provide image data at
sufficient bandwidth to avoid flicker or other visible artifacts in the
displayed image. Video information should only be transmitted using High
Speed Mode. Some Video Mode architectures may include a simple timing
controller and partial frame buffer, used to
maintain a partial-screen or lower-resolution image in standby or
low-power mode. This permits the interface to be shut down to reduce
power consumption. To reduce complexity and cost, systems that only
operate in Video Mode may use a unidirectional data path."

Thus, with Command mode, host can send command and image data to Panel
device, and with Video mode, host can send image data to Panel device in
High Speed Mode (HS clock enabled)

Therefore, I think MIPI_DSI_MODE_CMD_LPM and MIPI_DSI_MODE_VIDEO_LPM
flags have generic meaning,
In default, host transmits Command and image data to Panel in High Speed
Mode.

MIP_DSI_MODE_CMD_LPM: Host transmits command and image data to Panel in
Low Power mode, and also the host can read data from SRF and internal
frame buffer of Panel device. With this flag, host needs to set
transmission mode to Low Power Mode (and HS clock disabled)

MIPI_DSI_MODE_VIDEO_LPM: Host transmits image data to Panel in Low Power
mode. With this flags, host needs to set transmission mode to Low Power
Mode.

I think above two flags are common to all SoC.

In case of Exynos MIPI-DSI, 'CmdLpdt bit = 1' specifies that host
transmits commands to Panel in Low Power Mode so this would be
corresponded to MIPI_DSI_MODE_CMD_LPM. However, 'TxLpdt = 1' specifies
that host transmits all data that include commands and imageto Panel in
Low Power Mode (and HS clock disabled). So this bit would be
corresponded to MIPI_DSI_MODE_VIDEO_LPM.

Feel free to give me your opinions if you have other opinions or there
is my missing point.

Thanks,
Inki Dae

> 
>>
>> And above two flags can be combined together to transfer command and video
>> data to Panel device.
>>
>> MIPI DSI spec says,
>>      "the host processor controls the desired mode of clock operation.
>>       Host protocol and applications control Clock Lane operating mode
>>       (High Speed or Low Power mode). System designers are responsible
>>       for understanding the clock requirements for peripherals attached
>>       to DSI and controlling clock behavior in accordance with those
>>       requirements."
>>
>> Some LCD Panel devices, nt35502a, would need LPM transfer support
>> because they should receive some initial commands with LPM by default
>> hardware setting.
> 
> 
> Is this requirement for initial commands, or for all commands.
> Btw what is the mode of operation of nt35502a? What flags do you need
> for it?
> 
> 
> 
>>
>> Changelog v2: just add more descriptions.
>>
>> Signed-off-by: Inki Dae <inki.dae at samsung.com>
>> Acked-by: Kyungmin Park <kyungmin.park at samsung.com>
>> ---
>>  drivers/gpu/drm/drm_mipi_dsi.c |    3 +++
>>  include/drm/drm_mipi_dsi.h     |    4 ++++
>>  2 files changed, 7 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
>> index e633df2..6b2bbda 100644
>> --- a/drivers/gpu/drm/drm_mipi_dsi.c
>> +++ b/drivers/gpu/drm/drm_mipi_dsi.c
>> @@ -232,6 +232,9 @@ int mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, unsigned int channel,
>>  		break;
>>  	}
>>  
>> +	if (dsi->mode_flags & MIPI_DSI_MODE_CMD_LPM)
>> +		msg.flags = MIPI_DSI_MSG_USE_LPM;
>> +
>>  	return ops->transfer(dsi->host, &msg);
>>  }
> 
> Shouldn't this be also the same for dcs read?
> 
> Anyway I think check in the DSIM should be used instead, as panel driver
> can issue other dsi transfers without MIPI_DSI_MSG_USE_LPM flag set.
> 
> Regards
> Andrzej
> 
> 
>>  EXPORT_SYMBOL(mipi_dsi_dcs_write);
>> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
>> index 944f33f..1c41e49 100644
>> --- a/include/drm/drm_mipi_dsi.h
>> +++ b/include/drm/drm_mipi_dsi.h
>> @@ -94,6 +94,10 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
>>  #define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
>>  /* disable EoT packets in HS mode */
>>  #define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
>> +/* command low power mode */
>> +#define MIPI_DSI_MODE_CMD_LPM		BIT(10)
>> +/* video low power mode */
>> +#define MIPI_DSI_MODE_VIDEO_LPM		BIT(11)
>>  
>>  enum mipi_dsi_pixel_format {
>>  	MIPI_DSI_FMT_RGB888,
>>
> 
> 
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