i915 power management documentation

Daniel Vetter daniel at ffwll.ch
Mon Jun 2 09:45:59 PDT 2014


On Mon, Jun 02, 2014 at 04:15:11PM +0200, Gábor Bereczki wrote:
> Hello DRM developers,
> 
> I am looking after some documentation of the performance management of the
> GPU hardware, like registers
> 
> #define
> GEN6_RPNSWREQ                                                         0xA008
> 
> #define GEN6_RP_CONTROL
> 0xA024
> 
> 
> 
> and the likes.
> 
> 
> 
> I have checked Intel documentation online, but could not find any reference
> to those registers. As I understand they are in the graphics MMIO space,
> but could not find any specs for these registers.

The hw guys don't yet allow us to publish docs for this. We're working on
it. For now your best guess is to look at the code or ask around on the
#intel-gfx irc channel.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


More information about the dri-devel mailing list