[Bug 98821] [amdgpu][bisected][polaris] "drm/amdgpu: refine uvd 6.0 clock gate feature" sets MCLK on highest state

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Wed Nov 23 17:55:47 UTC 2016


https://bugs.freedesktop.org/show_bug.cgi?id=98821

--- Comment #12 from Alex Deucher <alexdeucher at gmail.com> ---
Does applying both patches help?

-- 
You are receiving this mail because:
You are the assignee for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20161123/dfe12ef7/attachment.html>


More information about the dri-devel mailing list