[Bug 98821] [amdgpu][bisected][polaris] "drm/amdgpu: refine uvd 6.0 clock gate feature" sets MCLK on highest state
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Mon Nov 28 23:15:54 UTC 2016
https://bugs.freedesktop.org/show_bug.cgi?id=98821
--- Comment #18 from Arek Ruśniak <arek.rusi at gmail.com> ---
Indeed, this is why i've checked :) Do you need more testing or should I close
this raport?
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