[Bug 102905] [R600] Miscompilation of TGSI to VLIW causes artifacts in Gallium Nine with Crysis2 bump mapping

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=102905

--- Comment #3 from Roland Scheidegger <sroland at vmware.com> ---
(In reply to iive from comment #2)
> The problem that causes this bug is when the first half of the above code,
> changes the condition check in the second. Something that will not happen,
> if "cndge" is executed as a single VLIW.
> Aka I have "cndge r0.xy, r0.xx, |r2|, r3" that is turned into:
>   mov  r12.x, |r2|
>   cndge r0.x, r0.x, r12, r3
>   mov  r12.y, |r2|
>   cndge r0.y, r0.x, r12, r3
> 
> I think that we should copy the whole register first.
> The generated code should looks like this:
> 
>   mov r12, |r2|
>   cndge r0.xy, r1, r12, r3

That analysis looks spot on. I've just sent a patch to mesa-dev which should
fix this, can you verify it works?

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