[PATCH 6/7] drm/bridge: tc358767: fix output H/V syncs
Tomi Valkeinen
tomi.valkeinen at ti.com
Tue Nov 27 11:56:51 UTC 2018
On 19/11/18 09:33, Andrzej Hajda wrote:
> On 29.10.2018 12:47, Tomi Valkeinen wrote:
>> The H and V syncs of the DP output are always set to active high. This
>> patch fixes the syncs by configuring them according to the videomode.
>>
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen at ti.com>
>> ---
>> drivers/gpu/drm/bridge/tc358767.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
>> index b026b5ef7378..be013bd7b30b 100644
>> --- a/drivers/gpu/drm/bridge/tc358767.c
>> +++ b/drivers/gpu/drm/bridge/tc358767.c
>> @@ -726,7 +726,9 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode)
>>
>> tc_write(DP0_ACTIVEVAL, (mode->vdisplay << 16) | (mode->hdisplay));
>>
>> - tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0));
>> + tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0) |
>> + ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? (1 << 15) : 0) |
>> + ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? (1 << 31) : 0));
>
>
> Defines for sync flags would be better.
Sure. I'll update the above to:
+ tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0) |
+ ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? SYNCVAL_HS_POL_ACTIVE_LOW : 0) |
+ ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? SYNCVAL_VS_POL_ACTIVE_LOW : 0));
Tomi
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