[PATCH v3 10/10] [HACK] arm64: dts: renesas: ebisu: Enable LVDS dual-link operation

[Fabrizio Castro]

Hello Jacopo,

> From: linux-renesas-soc-owner at vger.kernel.org <linux-renesas-soc-owner at vger.kernel.org> On Behalf Of Laurent Pinchart
> Sent: 28 May 2019 15:13
> Subject: [PATCH v3 10/10] [HACK] arm64: dts: renesas: ebisu: Enable LVDS dual-link operation
> 
> Enable and connect the second LVDS encoder to the second LVDS input of
> the THC63LVD1024 for dual-link LVDS operation. This requires changing
> the default settings of SW45 and SW47 to OFF and ON respectively.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas at ideasonboard.com>
> Tested-by: Jacopo Mondi <jacopo+renesas at jmondi.org>

How did you test this patch on Ebisu (kernel branch, configuration, switches,etc.)?

I tested both linux-next and drm/du/lvds/dual-link and they are not working for me.
The base configuration I am using is coming from arch/arm64/configs/defconfig from each respective branch, on top of that I am enabling the remaining bits and pieces.
I have tried the suggested configuration of the switches for this patch, basically nothing is happening. I have also tried reverting the changes made by this patch (on both branches), and of course I have reverted the selection for the switches as well, and even single-link doesn't work for me. Single-link support from the BSP version of the kernel (4.14.75-ltsi) works for me, that confirms the configuration of the switches I am using when testing single-link should be okay.

If, in the single-link use case from drm/du/lvds/dual-link, I connect lvds1 to the vga-encoder in the DT (like for the BSP DT, but I can see from the schematics that ADV7123 is actually connected to DU, like the configuration in the DT upstream), then HDMI works as expected (most of the time). 

I wonder if for some reason we may end up using the wrong lvds encoder at times, or no encoder at all?

Have you seen this problem? Am I missing something obvious here?

Thanks,
Fab

> ---
>  .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 24 +++++++++++++------
>  1 file changed, 17 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
> index c72772589953..988d82609f41 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
> @@ -93,11 +93,18 @@
> 
>  			port at 0 {
>  				reg = <0>;
> -				thc63lvd1024_in: endpoint {
> +				thc63lvd1024_in0: endpoint {
>  					remote-endpoint = <&lvds0_out>;
>  				};
>  			};
> 
> +			port at 1 {
> +				reg = <1>;
> +				thc63lvd1024_in1: endpoint {
> +					remote-endpoint = <&lvds1_out>;
> +				};
> +			};
> +
>  			port at 2 {
>  				reg = <2>;
>  				thc63lvd1024_out: endpoint {
> @@ -482,24 +489,27 @@
>  	ports {
>  		port at 1 {
>  			lvds0_out: endpoint {
> -				remote-endpoint = <&thc63lvd1024_in>;
> +				remote-endpoint = <&thc63lvd1024_in0>;
>  			};
>  		};
>  	};
>  };
> 
>  &lvds1 {
> -	/*
> -	 * Even though the LVDS1 output is not connected, the encoder must be
> -	 * enabled to supply a pixel clock to the DU for the DPAD output when
> -	 * LVDS0 is in use.
> -	 */
>  	status = "okay";
> 
>  	clocks = <&cpg CPG_MOD 727>,
>  		 <&x13_clk>,
>  		 <&extal_clk>;
>  	clock-names = "fck", "dclkin.0", "extal";
> +
> +	ports {
> +		port at 1 {
> +			lvds1_out: endpoint {
> +				remote-endpoint = <&thc63lvd1024_in1>;
> +			};
> +		};
> +	};
>  };
> 
>  &ohci0 {
> --
> Regards,
> 
> Laurent Pinchart