[PATCH v2 3/5] drm/bridge: sii902x: pixel clock unit is 10kHz instead of 1kHz

[Laurent Pinchart]

Hi Jyri,

Thank you for the patch.

On Wed, Feb 27, 2019 at 11:54:21PM +0200, Jyri Sarha wrote:
> The pixel clock unit in the first two registers (0x00 and 0x01) of
> sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by
> 10 fixes the issue.
> 
> Signed-off-by: Jyri Sarha <jsarha at ti.com>
> Reviewed-by: Andrzej Hajda <a.hajda at samsung.com>
> ---
>  drivers/gpu/drm/bridge/sii902x.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
> index 0e21fa419d27..1e917777ed72 100644
> --- a/drivers/gpu/drm/bridge/sii902x.c
> +++ b/drivers/gpu/drm/bridge/sii902x.c
> @@ -248,10 +248,11 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
>  	struct regmap *regmap = sii902x->regmap;
>  	u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
>  	struct hdmi_avi_infoframe frame;
> +	u16 pixel_clock_10kHz = adj->clock / 10;
>  	int ret;
>  
> -	buf[0] = adj->clock;
> -	buf[1] = adj->clock >> 8;
> +	buf[0] = pixel_clock_10kHz & 0xFF;

Nitpicking, we usually use lowercase hex values.

Apart from that,

Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>

> +	buf[1] = pixel_clock_10kHz >> 8;
>  	buf[2] = adj->vrefresh;
>  	buf[3] = 0x00;
>  	buf[4] = adj->hdisplay;

-- 
Regards,

Laurent Pinchart