[Bug 110208] New GPU sysfs Power State Interface for custom pp_od_clk_voltage

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=110208

--- Comment #1 from famo <richard.llom at gmail.com> ---
Link to  documentation:
https://dri.freedesktop.org/docs/drm/gpu/amdgpu.html#power-dpm-force-performance-level

Quote:
pp_od_clk_voltage

The amdgpu driver provides a sysfs API for adjusting the clocks and voltages in
each power level within a power state. The pp_od_clk_voltage is used for this.

< For Vega10 and previous ASICs >

Reading the file will display:

    a list of engine clock levels and voltages labeled OD_SCLK
    a list of memory clock levels and voltages labeled OD_MCLK
    a list of valid ranges for sclk, mclk, and voltage labeled OD_RANGE

To manually adjust these settings, first select manual using
power_dpm_force_performance_level. ...

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