[PATCH] drm: include: fix W=1 warnings in struct drm_dsc_config

Harry Wentland hwentlan at amd.com
Tue Sep 10 12:58:24 UTC 2019


+Manasi, Gaurav

On 2019-09-09 9:52 a.m., Benjamin Gaignard wrote:
> Change scale_increment_interval and nfl_bpg_offset fields to
> u32 to avoid W=1 warnings because we are testing them against
> 65535.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard at st.com>
> ---
>   include/drm/drm_dsc.h | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h
> index 887954cbfc60..e495024e901c 100644
> --- a/include/drm/drm_dsc.h
> +++ b/include/drm/drm_dsc.h
> @@ -207,11 +207,13 @@ struct drm_dsc_config {
>   	 * Number of group times between incrementing the scale factor value
>   	 * used at the beginning of a slice.
>   	 */
> -	u16 scale_increment_interval;
> +	u32 scale_increment_interval;

The DSC spec defines both as u16. I think the check in drm_dsc.c is 
useless and should be dropped.

Harry

> +
>   	/**
>   	 * @nfl_bpg_offset: Non first line BPG offset to be used
>   	 */
> -	u16 nfl_bpg_offset;
> +
> +	u32 nfl_bpg_offset;
>   	/**
>   	 * @slice_bpg_offset: BPG offset used to enforce slice bit
>   	 */
> 


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