[PATCH v6 22/52] ARM: tegra: Add interconnect properties to Tegra30 device-tree

Dmitry Osipenko digetx at gmail.com
Tue Oct 27 19:23:42 UTC 2020


27.10.2020 12:15, Krzysztof Kozlowski пишет:
...>> @@ -748,15 +770,18 @@ mc: memory-controller at 7000f000 {
>>  
>>  		#iommu-cells = <1>;
>>  		#reset-cells = <1>;
>> +		#interconnect-cells = <1>;
>>  	};
>>  
>> -	memory-controller at 7000f400 {
>> +	emc: memory-controller at 7000f400 {
>>  		compatible = "nvidia,tegra30-emc";
>>  		reg = <0x7000f400 0x400>;
>>  		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
>>  		clocks = <&tegra_car TEGRA30_CLK_EMC>;
>>  
>>  		nvidia,memory-controller = <&mc>;
>> +
> 
> No need for blank line.

It's needed to make MC and EMC nodes look consistent. See the MC node
above which has the blank line.

> 
>> +		#interconnect-cells = <0>;
>>  	};
>>  
>>  	fuse at 7000f800 {


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