[PATCH] drm: mxsfb: Support 24-bit SPWG, JEIDA bus formats

Jagan Teki jagan at amarulasolutions.com
Sun Jul 4 09:38:57 UTC 2021


24-bit SPWG, JEIDA bus formats are considered as 24-bit
bus widths for LCDC_CTRL register in mxsfb.

Add support for it.

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
 drivers/gpu/drm/mxsfb/mxsfb_kms.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
index 22cb749fc9bc..5657155f9633 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
@@ -85,6 +85,8 @@ static void mxsfb_set_formats(struct mxsfb_drm_private *mxsfb,
 		ctrl |= CTRL_BUS_WIDTH_18;
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 		ctrl |= CTRL_BUS_WIDTH_24;
 		break;
 	default:
-- 
2.25.1



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