[PATCH] drm/bridge: ps8640: Add double reset T4 and T5 to power-on sequence

[Rock Chiu]

Reviewed-by: Rock Chiu rock.chiu at paradetech.corp-partner.google.com

Rock Chiu


Hsin-Yi Wang <hsinyi at chromium.org> 於 2022年8月15日 週一 下午5:39寫道：

> The double reset power-on sequence is a workaround for the hardware
> flaw in some chip that SPI Clock output glitch and cause internal MPU
> unable to read firmware correctly. The sequence is suggested in ps8640
> application note.
>
> Signed-off-by: Hsin-Yi Wang <hsinyi at chromium.org>
> ---
>  drivers/gpu/drm/bridge/parade-ps8640.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c
> b/drivers/gpu/drm/bridge/parade-ps8640.c
> index 49107a6cdac18..d7483c13c569b 100644
> --- a/drivers/gpu/drm/bridge/parade-ps8640.c
> +++ b/drivers/gpu/drm/bridge/parade-ps8640.c
> @@ -375,6 +375,11 @@ static int __maybe_unused ps8640_resume(struct device
> *dev)
>         gpiod_set_value(ps_bridge->gpio_reset, 1);
>         usleep_range(2000, 2500);
>         gpiod_set_value(ps_bridge->gpio_reset, 0);
> +       /* Double reset for T4 and T5 */
> +       msleep(50);
> +       gpiod_set_value(ps_bridge->gpio_reset, 1);
> +       msleep(50);
> +       gpiod_set_value(ps_bridge->gpio_reset, 0);
>
>         /*
>          * Mystery 200 ms delay for the "MCU to be ready". It's unclear if
> --
> 2.37.1.595.g718a3a8f04-goog
>
>
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