[PATCH v3 15/26] drm: sun4i: vi_scaler refactor vi_scaler enablement
Ryan Walklin
ryan at testtoast.com
Sat Aug 17 22:46:02 UTC 2024
From: Jernej Skrabec <jernej.skrabec at gmail.com>
If the video scaler is required, then it is obligatory to set the
relevant register to enable it, so move this to the
sun8i_vi_scaler_setup() function.
This simplifies the alternate case (scaler not required) so replace the
vi_scaler_enable() function with a vi_scaler_disable() function.
Signed-off-by: Jernej Skrabec <jernej.skrabec at gmail.com>
Signed-off-by: Ryan Walklin <ryan at testtoast.com>
---
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 3 +--
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 21 +++++++++++----------
drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 2 +-
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 4647e9bcccaa7..e348fd0a3d81c 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -156,10 +156,9 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w,
dst_h, hscale, vscale, hphase, vphase,
format);
- sun8i_vi_scaler_enable(mixer, channel, true);
} else {
DRM_DEBUG_DRIVER("HW scaling is not needed\n");
- sun8i_vi_scaler_enable(mixer, channel, false);
+ sun8i_vi_scaler_disable(mixer, channel);
}
regmap_write(mixer->engine.regs,
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
index aa346c3beb303..e7242301b312c 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
@@ -933,20 +933,13 @@ static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base,
&table[offset], SUN8I_VI_SCALER_COEFF_COUNT);
}
-void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable)
+void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer)
{
- u32 val, base;
+ u32 base;
base = sun8i_vi_scaler_base(mixer, layer);
- if (enable)
- val = SUN8I_SCALER_VSU_CTRL_EN |
- SUN8I_SCALER_VSU_CTRL_COEFF_RDY;
- else
- val = 0;
-
- regmap_write(mixer->engine.regs,
- SUN8I_SCALER_VSU_CTRL(base), val);
+ regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), 0);
}
void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
@@ -982,6 +975,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
cvphase = vphase;
}
+ regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base),
+ SUN8I_SCALER_VSU_CTRL_EN);
+
if (mixer->cfg->de_type >= sun8i_mixer_de3) {
u32 val;
@@ -1027,4 +1023,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
else
sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base,
hscale, vscale, format);
+
+ if (mixer->cfg->de_type <= sun8i_mixer_de3)
+ regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base),
+ SUN8I_SCALER_VSU_CTRL_EN |
+ SUN8I_SCALER_VSU_CTRL_COEFF_RDY);
}
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
index 68f6593b369ab..e801bc7a4189e 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
@@ -69,7 +69,7 @@
#define SUN50I_SCALER_VSU_ANGLE_SHIFT(x) (((x) << 16) & 0xF)
#define SUN50I_SCALER_VSU_ANGLE_OFFSET(x) ((x) & 0xFF)
-void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
+void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer);
void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
u32 hscale, u32 vscale, u32 hphase, u32 vphase,
--
2.46.0
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