[PATCH v2 2/2] drm: adv7511: Fix out-of-bounds array in clock_div_by_lanes
Biju Das
biju.das.jz at bp.renesas.com
Wed Nov 6 17:32:03 UTC 2024
Hi Laurent Pinchart,
> -----Original Message-----
> From: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> Sent: 05 November 2024 16:06
> Subject: Re: [PATCH v2 2/2] drm: adv7511: Fix out-of-bounds array in clock_div_by_lanes
>
> Hi Biju,
>
> Thank you for the patch.
>
> On Tue, Nov 05, 2024 at 11:12:19AM +0000, Biju Das wrote:
> > Fix out-of-bounds array in adv7511_dsi_config_timing_gen(), when dsi
> > lanes = 1.
>
> Does the hardware support using the internal timing generator with a single lane ? If so
> adv7511_dsi_config_timing_gen() should be fixed, otherwise that should be explained in the commit
> message, and mentioned with a comment in adv7533_parse_dt(). I would also print an error message in
> that case.
>
> If the internal timing generator can't be used with a single lane, the DT bindings should also be
> updated to document that.
As per [1], lanes = 1 is not supported in ADV7535/ADV7533.
I will update the code and binding to remove lanes=1 support.
[1]
https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7535.pdf
Cheers,
Biju
>
> > Fixes: 78fa479d703c ("drm/bridge: adv7533: Use internal timing
> > generator")
> > Reported-by: Hien Huynh <hien.huynh.px at renesas.com>
> > Signed-off-by: Biju Das <biju.das.jz at bp.renesas.com>
> > ---
> > Changes in v2:
> > - Added the tag "Cc: stable at vger.kernel.org" in the sign-off area.
> > - Dropped Archit Taneja invalid Mail address
> > ---
> > drivers/gpu/drm/bridge/adv7511/adv7533.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
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