[PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti, lvds-vcom

[Andrej Picej]

From: Janine Hagemann <j.hagemann at phytec.de>

Add an optional property to change LVDS output voltage. This depends on
the connected display specifications. With this property we directly set
the LVDS_VCOM (0x19) register.
Better register property mapping would be quite tricky. Please check
bridge's datasheet for details on how register values set the LVDS
data lines and LVDS clock output voltage.

Signed-off-by: Janine Hagemann <j.hagemann at phytec.de>
Signed-off-by: Andrej Picej <andrej.picej at norik.com>
---
 .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
index 48a97bb3e2e0..5b2c0c281824 100644
--- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
@@ -58,6 +58,12 @@ properties:
                   - const: 2
                   - const: 3
                   - const: 4
+              ti,lvds-vcom:
+                $ref: /schemas/types.yaml#/definitions/uint32
+                description: LVDS output voltage configuration. This defines
+                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
+                  details on how register values set the LVDS data lines and
+                  LVDS clock output voltage.
 
       port at 1:
         $ref: /schemas/graph.yaml#/$defs/port-base
@@ -78,6 +84,12 @@ properties:
                   - const: 2
                   - const: 3
                   - const: 4
+              ti,lvds-vcom:
+                $ref: /schemas/types.yaml#/definitions/uint32
+                description: LVDS output voltage configuration. This defines
+                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
+                  details on how register values set the LVDS data lines and
+                  LVDS clock output voltage.
 
       port at 2:
         $ref: /schemas/graph.yaml#/properties/port
@@ -120,7 +132,7 @@ allOf:
           properties:
             port at 1: false
 
-additionalProperties: false
+additionalProperties: true
 
 examples:
   - |
-- 
2.34.1