[Freedreno] [PATCH] rnndb/a3xx: document stencil buffer fields

[Ilia Mirkin]

Worked out from looking at Z32F_S8 traces -- the depth and stencil
parts are kept entirely separate.
---
 rnndb/adreno/a3xx.xml | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/rnndb/adreno/a3xx.xml b/rnndb/adreno/a3xx.xml
index c396ddb..eb4a433 100644
--- a/rnndb/adreno/a3xx.xml
+++ b/rnndb/adreno/a3xx.xml
@@ -721,7 +721,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 		<bitfield name="DEPTH_BASE" low="11" high="31" shr="12" type="hex"/>
 	</reg32>
 	<reg32 offset="0x2103" name="RB_DEPTH_PITCH" shr="3" type="uint">
-		<doc>pitch of depth/stencil buffer</doc>
+		<doc>pitch of depth buffer</doc>
 	</reg32>
 	<reg32 offset="0x2104" name="RB_STENCIL_CONTROL">
 		<bitfield name="STENCIL_ENABLE" pos="0" type="boolean"/>
@@ -745,11 +745,11 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<reg32 offset="0x2105" name="RB_STENCIL_CLEAR">
 		<doc>seems to be always set to 0x00000000</doc>
 	</reg32>
-	<reg32 offset="0x2106" name="RB_STENCIL_BUF_INFO">
-		<doc>seems to be always set to 0x00000000, except 0x2000 for Z32_X24S8(?)</doc>
+	<reg32 offset="0x2106" name="RB_STENCIL_INFO">
+		<bitfield name="STENCIL_BASE" low="11" high="31" shr="12" type="hex"/>
 	</reg32>
-	<reg32 offset="0x2107" name="RB_STENCIL_BUF_PITCH">
-		<doc>seems to be always set to 0x00000000</doc>
+	<reg32 offset="0x2107" name="RB_STENCIL_PITCH" shr="3" type="uint">
+		<doc>pitch of stencil buffer</doc>
 	</reg32>
 	<reg32 offset="0x2108" name="RB_STENCILREFMASK" type="adreno_rb_stencilrefmask"/>
 	<reg32 offset="0x2109" name="RB_STENCILREFMASK_BF" type="adreno_rb_stencilrefmask"/>
-- 
2.0.5