[Freedreno] [PATCH v12 3/5] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings

[Stephen Boyd]

Quoting spanda at codeaurora.org (2018-06-24 21:56:05)
> On 2018-06-22 06:42, Stephen Boyd wrote:
> > Quoting Sandeep Panda (2018-06-21 05:32:07)
> >> +         clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 
> >> MHz.
> >> +
> >> +- data-lanes: See ../../media/video-interface.txt
> >> +- lane-polarities: See ../../media/video-interface.txt
> > 
> > We need another property for suspend-gpios function of GPIO1. I suppose
> > for the other GPIOs we don't need anything like this because they're
> > output functions only? GPIO4 can do PWM and I guess if pwm is used in 
> > DT
> > from here then the driver can mux that out of gpio4 properly. I have no
> > idea how the hsync and vsync GPIOs would work though. I see that GPIO3
> > can do DSIA hsync or vsync and GPIO2 can do DSIA vsync and I would 
> > guess
> > those are in output mode only. Maybe that's just another property on
> > this node to indicate if we should mux out the function or not. Usually
> > that's done from pinctrl though. I don't have a use case for those
> > functions but I do care about suspend gpios so at least add that one
> > please.
> 
> I was thinking of adding gpio1 (suspend-gpio) documentation when we add
> support for PSR feature. Since for PSR we will be using this 
> suspoend-gpio.
> 

Ok sure, but I don't see any harm in adding it now. I'm fine with
waiting for the binding update when the PSR patches come if you feel
like adding it now will delay something.