[PATCH 6/8] drm/msm/dp: Add maximum width limitation for modes
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Tue Dec 3 13:58:54 UTC 2024
On Tue, Dec 03, 2024 at 03:41:53PM +0800, Xiangxu Yin wrote:
>
>
> On 12/2/2024 5:32 PM, Dmitry Baryshkov wrote:
> > On Mon, 2 Dec 2024 at 11:05, Xiangxu Yin <quic_xiangxuy at quicinc.com> wrote:
> >>
> >>
> >>
> >> On 11/29/2024 9:52 PM, Dmitry Baryshkov wrote:
> >>> On Fri, 29 Nov 2024 at 09:59, Xiangxu Yin <quic_xiangxuy at quicinc.com> wrote:
> >>>>
> >>>> Introduce a maximum width constraint for modes during validation. This
> >>>> ensures that the modes are filtered based on hardware capabilities,
> >>>> specifically addressing the line buffer limitations of individual pipes.
> >>>
> >>> This doesn't describe, why this is necessary. What does "buffer
> >>> limitations of individual pipes" mean?
> >>> If the platforms have hw capabilities like being unable to support 8k
> >>> or 10k, it should go to platform data
> >>>
> >> It's SSPP line buffer limitation for this platform and only support to 2160 mode width.
> >> Then, shall I add max_width config to struct msm_dp_desc in next patch? for other platform will set defualt value to ‘DP_MAX_WIDTH 7680'
> >
> > SSPP line buffer limitations are to be handled in the DPU driver. The
> > DP driver shouldn't care about those.
> >
> Ok, Will drop this part in next patch.
If you drop it, what will be left from the patch itself?
> >>>>
> >>>> Signed-off-by: Xiangxu Yin <quic_xiangxuy at quicinc.com>
> >>>> ---
> >>>> drivers/gpu/drm/msm/dp/dp_display.c | 3 +++
> >>>> drivers/gpu/drm/msm/dp/dp_display.h | 1 +
> >>>> drivers/gpu/drm/msm/dp/dp_panel.c | 13 +++++++++++++
> >>>> drivers/gpu/drm/msm/dp/dp_panel.h | 1 +
> >>>> 4 files changed, 18 insertions(+)
> >
> >
>
--
With best wishes
Dmitry
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