[PATCH 4/5] drm/msm/dpu: Add QCS8300 support

Yongxing Mou quic_yongmou at quicinc.com
Thu Dec 5 09:01:37 UTC 2024



On 2024/11/29 21:32, Dmitry Baryshkov wrote:
> On Fri, 29 Nov 2024 at 12:01, Yongxing Mou <quic_yongmou at quicinc.com> wrote:
>>
>>
>>
>> On 2024/11/27 21:49, Dmitry Baryshkov wrote:
>>> On Wed, Nov 27, 2024 at 03:05:04PM +0800, Yongxing Mou wrote:
>>>> Add definitions for the display hardware used on the
>>>> Qualcomm QCS8300 platform.
>>>>
>>>> Signed-off-by: Yongxing Mou <quic_yongmou at quicinc.com>
>>>> ---
>>>>    .../drm/msm/disp/dpu1/catalog/dpu_8_4_qcs8300.h    | 485 +++++++++++++++++++++
>>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |   1 +
>>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |   1 +
>>>>    drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c            |   1 +
>>>>    4 files changed, 488 insertions(+)
>>>>
>>>>
>>>
>>> NAK, there is no need for this.
>> Got it,thanks. will modify it in next patchset.Compared to sa8775p, they
>> use same dpu but qcs8300 has one less intf and two fewer dp intfs. Other
>> configurations are the same.can we reuse it or a new catalog file to
>> show it.
> 
> Is it actually not populated in the silicon? What happens if one
> access those INTF_n registers?
> 
yes, intf_n and ctrl is present in silicon.it is fine to dump intf/ctrl 
registers.


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