[PATCH v2 2/2] arm64: dts: qcom: sm8650: correct MDSS interconnects

[Neil Armstrong]

On 26/10/2024 19:59, Dmitry Baryshkov wrote:
> SM8650 lists two interconnects for the display subsystem, mdp0-mem
> (between MDP and LLCC) and mdp1-mem (between LLCC and EBI, memory).
> The second interconnect is a misuse. mdpN-mem paths should be used for
> several outboud MDP interconnects rather than the path between LLCC and
> memory. This kind of misuse can result in bandwidth underflows, possibly
> degrading picture quality as the required memory bandwidth is divided
> between all mdpN-mem paths (and LLCC-EBI should not be a part of such
> division).
> 
> Drop the second path and use direct MDP-EBI path for mdp0-mem until we
> support separate MDP-LLCC and LLCC-EBI paths.
> 
> Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
> Cc: stable at kernel.org
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>   arch/arm64/boot/dts/qcom/sm8650.dtsi | 5 +----
>   1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 173e092b15e2..4b54063c0e0c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -3455,11 +3455,8 @@ mdss: display-subsystem at ae00000 {
>   			resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
>   
>   			interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS
> -					 &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>,
> -					<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS
>   					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> -			interconnect-names = "mdp0-mem",
> -					     "mdp1-mem";
> +			interconnect-names = "mdp0-mem";
>   
>   			power-domains = <&dispcc MDSS_GDSC>;
>   
> 

Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>