[igt-dev] [PATCH i-g-t v3 1/3] lib/rendercopy: Add gen4/5 rendercopy

[Katarzyna Dec]

On Thu, Jul 12, 2018 at 04:15:22PM +0200, Lukasz Kalamarz wrote:
> Add rendercopy implementation for gen4/5. Basic structure
> copied from the gen6 implementation, and the gen4/5 specific
> bits were mostly lifted from sna.
> 
> v2: Renamed registers definitions, which are GEN4 specific
> to include that prefix (Lukasz)
> v3: Rebase and checkpatch
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz at intel.com>
> Cc: Katarzyna Dec <katarzyna.dec at intel.com>
> Cc: Antonio Argenziano <antonio.argenziano at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
>  lib/Makefile.sources    |   2 +
>  lib/gen4_render.h       | 628 ++++++++++++++++++++++++++++++++++++++++++
>  lib/intel_batchbuffer.c |   2 +
>  lib/meson.build         |   1 +
>  lib/rendercopy.h        |   5 +
>  lib/rendercopy_gen4.c   | 707 ++++++++++++++++++++++++++++++++++++++++++++++++
>  6 files changed, 1345 insertions(+)
>  create mode 100644 lib/gen4_render.h
>  create mode 100644 lib/rendercopy_gen4.c
> 
> diff --git a/lib/Makefile.sources b/lib/Makefile.sources
> index 042c1d3b..e0ebd02c 100644
> --- a/lib/Makefile.sources
> +++ b/lib/Makefile.sources
> @@ -71,10 +71,12 @@ lib_source_list =	 	\
>  	gen8_media.h            \
>  	rendercopy_i915.c	\
>  	rendercopy_i830.c	\
> +	gen4_render.h		\
>  	gen6_render.h		\
>  	gen7_render.h		\
>  	gen8_render.h		\
>  	gen9_render.h		\
> +	rendercopy_gen4.c	\
>  	rendercopy_gen6.c	\
>  	rendercopy_gen7.c	\
>  	rendercopy_gen8.c	\
> diff --git a/lib/gen4_render.h b/lib/gen4_render.h
> new file mode 100644
> index 00000000..ab6b9c9f
> --- /dev/null
> +++ b/lib/gen4_render.h
> @@ -0,0 +1,628 @@
> +#ifndef GEN4_RENDER_H
> +#define GEN4_RENDER_H
> +
> +#include <stdint.h>
> +
> +#define GEN4_3D(Pipeline, Opcode, Subopcode)	((3 << 29) | \
> +						((Pipeline) << 27) | \
> +						((Opcode) << 24) | \
> +						((Subopcode) << 16))
> +
> +#define GEN4_URB_FENCE				GEN4_3D(0, 0, 0)
> +# define UF0_CS_REALLOC				(1 << 13)
> +# define UF0_VFE_REALLOC			(1 << 12)
> +# define UF0_SF_REALLOC				(1 << 11)
> +# define UF0_CLIP_REALLOC			(1 << 10)
> +# define UF0_GS_REALLOC				(1 << 9)
> +# define UF0_VS_REALLOC				(1 << 8)
> +# define UF1_CLIP_FENCE_SHIFT			20
> +# define UF1_GS_FENCE_SHIFT			10
> +# define UF1_VS_FENCE_SHIFT			0
> +# define UF2_CS_FENCE_SHIFT			20
> +# define UF2_VFE_FENCE_SHIFT			10
> +# define UF2_SF_FENCE_SHIFT			0

I go not like that values in defines are not aligned, but
this is not something that should block merging patches.

Reviewed-by: Katarzyna Dec <katarzyna.dec at intel.com>