[igt-dev] [RFT v4 4/6] igt/i915: Require GTT mapping to be available when needed.
Katarzyna Dec
katarzyna.dec at intel.com
Tue Apr 16 14:38:24 UTC 2019
On Mon, Mar 25, 2019 at 04:20:41PM -0700, Antonio Argenziano wrote:
> With the GTT aperture becoming unavailable on certain platforms, tests
> that target that mapping need to skip if such mapping is not available.
>
> Cc: Katarzyna Dec <katarzyna.dec at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld at intel.com>
> Signed-off-by: Antonio Argenziano <antonio.argenziano at intel.com>
> ---
> lib/igt_dummyload.c | 4 +++-
> lib/igt_fb.c | 5 +++--
> tests/i915/gem_concurrent_all.c | 1 +
> tests/i915/gem_ctx_sseu.c | 4 +++-
> tests/i915/gem_exec_basic.c | 1 +
> tests/i915/gem_exec_faulting_reloc.c | 2 ++
> tests/i915/gem_exec_flush.c | 6 ++++++
> tests/i915/gem_exec_reloc.c | 7 +++++++
> tests/i915/gem_exec_schedule.c | 5 ++++-
> tests/i915/gem_fence_thrash.c | 6 ++++++
> tests/i915/gem_gtt_cpu_tlb.c | 1 +
> tests/i915/gem_gtt_hog.c | 1 +
> tests/i915/gem_gtt_speed.c | 1 +
> tests/i915/gem_largeobject.c | 2 ++
> tests/i915/gem_madvise.c | 4 ++++
> tests/i915/gem_mmap_gtt.c | 4 +++-
> tests/i915/gem_mmap_offset_exhaustion.c | 2 ++
> tests/i915/gem_mmap_wc.c | 2 ++
> tests/i915/gem_persistent_relocs.c | 2 ++
> tests/i915/gem_pwrite_pread.c | 6 ++++++
> tests/i915/gem_reloc_vs_gpu.c | 21 ++++++++++++---------
> tests/i915/gem_render_copy.c | 2 ++
> tests/i915/gem_set_tiling_vs_gtt.c | 2 ++
> tests/i915/gem_set_tiling_vs_pwrite.c | 2 ++
> tests/i915/gem_shrink.c | 14 +++++++++++---
> tests/i915/gem_storedw_loop.c | 9 +++++++++
> tests/i915/gem_streaming_writes.c | 16 ++++++++++++++--
> tests/i915/gem_tiled_fence_blits.c | 1 +
> tests/i915/gem_tiled_pread_basic.c | 1 +
> tests/i915/gem_tiled_pread_pwrite.c | 4 +++-
> tests/i915/gem_tiled_swapping.c | 2 ++
> tests/i915/gem_tiled_wb.c | 2 ++
> tests/i915/gem_tiled_wc.c | 1 +
> tests/i915/gem_tiling_max_stride.c | 3 ++-
> tests/i915/gem_userptr_blits.c | 10 +++++++++-
> tests/i915/i915_pm_rpm.c | 9 +++++++++
> tests/i915/i915_suspend.c | 2 ++
> tests/kms_draw_crc.c | 8 ++++++--
> tests/kms_fence_pin_leak.c | 2 ++
> tests/kms_frontbuffer_tracking.c | 3 +++
> tests/kms_psr.c | 4 ++++
> tests/prime_mmap.c | 2 ++
> tests/prime_mmap_coherency.c | 1 +
> tests/prime_vgem.c | 5 +++++
> 44 files changed, 167 insertions(+), 25 deletions(-)
>
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
> index 47f6b92b..2e4c0335 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -117,9 +117,11 @@ emit_recursive_batch(igt_spin_t *spin,
> obj[BATCH].handle = gem_create(fd, BATCH_SIZE);
> batch = __gem_mmap__wc(fd, obj[BATCH].handle,
> 0, BATCH_SIZE, PROT_WRITE);
> - if (!batch)
> + if (!batch) {
> + gem_require_mmap_gtt(fd);
> batch = gem_mmap__gtt(fd, obj[BATCH].handle,
> BATCH_SIZE, PROT_WRITE);
> + }
> gem_set_domain(fd, obj[BATCH].handle,
> I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> execbuf->buffer_count++;
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index bad1d1fb..068cd7fe 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -1746,10 +1746,11 @@ static void *map_bo(int fd, struct igt_fb *fb)
> if (fb->is_dumb)
> ptr = kmstest_dumb_map_buffer(fd, fb->gem_handle, fb->size,
> PROT_READ | PROT_WRITE);
> - else if (is_i915_device(fd))
> + else if (is_i915_device(fd)) {
> + gem_require_mmap_gtt(fd);
> ptr = gem_mmap__gtt(fd, fb->gem_handle, fb->size,
> PROT_READ | PROT_WRITE);
I wasn't able to easily apply this patch see how it looks in the code, but from
here it is like closing '}' is missing. Please double check :)
> - else if (is_vc4_device(fd))
> + } else if (is_vc4_device(fd))
> ptr = igt_vc4_mmap_bo(fd, fb->gem_handle, fb->size,
> PROT_READ | PROT_WRITE);
> else
> diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
> index f719b0a1..e4fc1426 100644
> --- a/tests/i915/gem_concurrent_all.c
> +++ b/tests/i915/gem_concurrent_all.c
> @@ -1422,6 +1422,7 @@ static void cpu_require(void)
>
> static void gtt_require(void)
> {
> + gem_require_mmap_gtt(fd);
> }
>
> static void bcs_require(void)
> diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
> index 3afa5c15..bf1b50d5 100644
> --- a/tests/i915/gem_ctx_sseu.c
> +++ b/tests/i915/gem_ctx_sseu.c
> @@ -528,8 +528,10 @@ igt_main
> igt_subtest("invalid-sseu")
> test_invalid_sseu(fd);
>
> - igt_subtest("ggtt-args")
> + igt_subtest("ggtt-args") {
> + gem_require_mmap_gtt(fd);
> test_ggtt_args(fd);
> + }
>
> igt_subtest("engines")
> test_engines(fd);
> diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
> index dcb83864..8537665f 100644
> --- a/tests/i915/gem_exec_basic.c
> +++ b/tests/i915/gem_exec_basic.c
> @@ -93,6 +93,7 @@ static void gtt(int fd, unsigned ring)
> struct drm_i915_gem_exec_object2 *exec;
> uint32_t handle;
>
> + gem_require_mmap_gtt(fd);
> gem_require_ring(fd, ring);
>
> handle = gem_create(fd, 4096);
> diff --git a/tests/i915/gem_exec_faulting_reloc.c b/tests/i915/gem_exec_faulting_reloc.c
> index 6b05e43f..9db80f54 100644
> --- a/tests/i915/gem_exec_faulting_reloc.c
> +++ b/tests/i915/gem_exec_faulting_reloc.c
> @@ -173,6 +173,8 @@ static void run(int object_size)
>
> fd = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(fd);
> + gem_require_mmap_gtt(fd);
> +
> devid = intel_get_drm_devid(fd);
> handle = gem_create(fd, 4096);
> src = gem_create(fd, object_size);
> diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
> index f820b2a8..29b13803 100644
> --- a/tests/i915/gem_exec_flush.c
> +++ b/tests/i915/gem_exec_flush.c
> @@ -79,6 +79,9 @@ static void run(int fd, unsigned ring, int nchild, int timeout,
> {
> const int gen = intel_gen(intel_get_drm_devid(fd));
>
> + if (!(flags & COHERENT) && !(flags & WC))
> + gem_require_mmap_gtt(fd);
> +
> /* The crux of this testing is whether writes by the GPU are coherent
> * from the CPU.
> *
> @@ -586,6 +589,7 @@ igt_main
> fd = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(fd);
> gem_require_mmap_wc(fd);
> + gem_require_mmap_gtt(fd);
Is mmap_gtt in conflict with mmap_wc (we use both here)? Or I am wrong?
> igt_require(gem_can_store_dword(fd, 0));
> igt_info("Has LLC? %s\n", yesno(gem_has_llc(fd)));
>
> @@ -614,11 +618,13 @@ igt_main
> b->name,
> e->name)
> batch(fd, ring, ncpus, timeout, b->mode, 0);
> +
> igt_subtest_f("%sbatch-%s-%s-wb",
> b == batches && e->exec_id == 0 ? "basic-" : "",
> b->name,
> e->name)
> batch(fd, ring, ncpus, timeout, b->mode, COHERENT);
> +
> igt_subtest_f("%sbatch-%s-%s-cmd",
> b == batches && e->exec_id == 0 ? "basic-" : "",
> b->name,
> diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
> index 837f60a6..bb4eec31 100644
> --- a/tests/i915/gem_exec_reloc.c
> +++ b/tests/i915/gem_exec_reloc.c
> @@ -115,6 +115,9 @@ static void from_mmap(int fd, uint64_t size, enum mode mode)
> */
> intel_require_memory(2, size, CHECK_RAM);
>
> + if ((mode & ~RO) == GTT)
> + gem_require_mmap_gtt(fd);
> +
> memset(&obj, 0, sizeof(obj));
> obj.handle = gem_create(fd, 4096);
> gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
> @@ -342,6 +345,9 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags)
> const uint32_t bbe = MI_BATCH_BUFFER_END;
> unsigned int reloc_offset;
>
> + if ((before | after) & I915_GEM_DOMAIN_GTT)
> + gem_require_mmap_gtt(fd);
Why do we need such check here?
> +
> memset(&obj, 0, sizeof(obj));
> obj.handle = gem_create(fd, OBJSZ);
> obj.relocs_ptr = to_user_pointer(&reloc);
> @@ -711,6 +717,7 @@ igt_main
> f->name) {
> if ((m->before | m->after) & I915_GEM_DOMAIN_WC)
> igt_require(gem_mmap__has_wc(fd));
> +
> basic_reloc(fd, m->before, m->after, f->flags);
> }
> }
> diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
> index a9383000..15c8440f 100644
> --- a/tests/i915/gem_exec_schedule.c
> +++ b/tests/i915/gem_exec_schedule.c
> @@ -1236,6 +1236,7 @@ igt_main
> igt_subtest_f("independent-%s", e->name) {
> igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
> igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
> + gem_require_mmap_gtt(fd);
> independent(fd, e->exec_id | e->flags);
> }
> }
> @@ -1328,8 +1329,10 @@ igt_main
> igt_subtest_f("wide-%s", e->name)
> wide(fd, e->exec_id | e->flags);
>
> - igt_subtest_f("reorder-wide-%s", e->name)
> + igt_subtest_f("reorder-wide-%s", e->name) {
> + gem_require_mmap_gtt(fd);
> reorder_wide(fd, e->exec_id | e->flags);
> + }
>
> igt_subtest_f("smoketest-%s", e->name)
> smoketest(fd, e->exec_id | e->flags, 5);
> diff --git a/tests/i915/gem_fence_thrash.c b/tests/i915/gem_fence_thrash.c
> index 2d7fb2ff..5567e37e 100644
> --- a/tests/i915/gem_fence_thrash.c
> +++ b/tests/i915/gem_fence_thrash.c
> @@ -236,6 +236,12 @@ igt_main
> {
> igt_skip_on_simulation();
>
> + igt_fixture {
> + int fd = drm_open_driver(DRIVER_INTEL);
> + igt_require(gem_available_fences(fd) > 0); /* GTT mapping available */
> + close(fd);
> + }
> +
> igt_subtest("bo-write-verify-none")
> igt_assert(run_test(0, bo_write_verify, I915_TILING_NONE, 80) == 0);
>
> diff --git a/tests/i915/gem_gtt_cpu_tlb.c b/tests/i915/gem_gtt_cpu_tlb.c
> index cf3c543d..02682a0d 100644
> --- a/tests/i915/gem_gtt_cpu_tlb.c
> +++ b/tests/i915/gem_gtt_cpu_tlb.c
> @@ -79,6 +79,7 @@ igt_simple_main
> igt_skip_on_simulation();
>
> fd = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd);
>
> handle = gem_create(fd, OBJ_SIZE);
>
> diff --git a/tests/i915/gem_gtt_hog.c b/tests/i915/gem_gtt_hog.c
> index ca730649..b2eea679 100644
> --- a/tests/i915/gem_gtt_hog.c
> +++ b/tests/i915/gem_gtt_hog.c
> @@ -161,6 +161,7 @@ igt_simple_main
> /* check for an intel gpu before goint nuts. */
> int fd = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(fd);
> + gem_require_mmap_gtt(fd);
> close(fd);
>
> igt_skip_on_simulation();
> diff --git a/tests/i915/gem_gtt_speed.c b/tests/i915/gem_gtt_speed.c
> index 3d726c4e..f1778370 100644
> --- a/tests/i915/gem_gtt_speed.c
> +++ b/tests/i915/gem_gtt_speed.c
> @@ -116,6 +116,7 @@ int main(int argc, char **argv)
> buf = malloc(size);
> memset(buf, 0, size);
> fd = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd);
>
> handle = gem_create(fd, size);
> igt_assert(handle);
> diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
> index 518396fa..a2d47edc 100644
> --- a/tests/i915/gem_largeobject.c
> +++ b/tests/i915/gem_largeobject.c
> @@ -84,6 +84,8 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
> +
> test_large_object(fd);
>
> free(data);
> diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
> index 729a4d33..f4226a84 100644
> --- a/tests/i915/gem_madvise.c
> +++ b/tests/i915/gem_madvise.c
> @@ -61,6 +61,8 @@ dontneed_before_mmap(void)
> uint32_t handle;
> char *ptr;
>
> + gem_require_mmap_gtt(fd);
> +
> handle = gem_create(fd, OBJECT_SIZE);
> gem_madvise(fd, handle, I915_MADV_DONTNEED);
> ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
> @@ -89,6 +91,8 @@ dontneed_after_mmap(void)
> uint32_t handle;
> char *ptr;
>
> + gem_require_mmap_gtt(fd);
> +
> handle = gem_create(fd, OBJECT_SIZE);
> ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
> igt_assert(ptr);
> diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
> index 639de190..de4a5bb5 100644
> --- a/tests/i915/gem_mmap_gtt.c
> +++ b/tests/i915/gem_mmap_gtt.c
> @@ -874,8 +874,10 @@ igt_main
> if (igt_run_in_simulation())
> OBJECT_SIZE = 1 * 1024 * 1024;
>
> - igt_fixture
> + igt_fixture {
> fd = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd);
> + }
>
> igt_subtest("bad-object") {
> uint32_t real_handle = gem_create(fd, 4096);
> diff --git a/tests/i915/gem_mmap_offset_exhaustion.c b/tests/i915/gem_mmap_offset_exhaustion.c
> index 8c8e3fa2..86464231 100644
> --- a/tests/i915/gem_mmap_offset_exhaustion.c
> +++ b/tests/i915/gem_mmap_offset_exhaustion.c
> @@ -82,6 +82,8 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
> +
> /* we have 32bit of address space, so try to fit one MB more
> * than that. */
> for (i = 0; i < 4096 + 1; i++)
> diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
> index e3ffc5ad..3c33034c 100644
> --- a/tests/i915/gem_mmap_wc.c
> +++ b/tests/i915/gem_mmap_wc.c
> @@ -334,6 +334,8 @@ test_write_gtt_read_wc(int fd)
> uint32_t handle;
> uint32_t *src, *dst;
>
> + gem_require_mmap_gtt(fd);
> +
> handle = gem_create(fd, OBJECT_SIZE);
> set_domain(fd, handle);
>
> diff --git a/tests/i915/gem_persistent_relocs.c b/tests/i915/gem_persistent_relocs.c
> index 452fe686..17266c48 100644
> --- a/tests/i915/gem_persistent_relocs.c
> +++ b/tests/i915/gem_persistent_relocs.c
> @@ -199,6 +199,8 @@ static void do_test(int fd, bool faulting_reloc)
> uint32_t test;
> int i, repeat;
>
> + gem_require_mmap_gtt(fd);
> +
Why you are adding this check here not in main? Here it is somehow hidden, in
main would be more visible.
> if (faulting_reloc)
> igt_disable_prefault();
>
> diff --git a/tests/i915/gem_pwrite_pread.c b/tests/i915/gem_pwrite_pread.c
> index f91fc7c4..43b3987a 100644
> --- a/tests/i915/gem_pwrite_pread.c
> +++ b/tests/i915/gem_pwrite_pread.c
> @@ -182,6 +182,8 @@ static void test_as_gtt_mmap(int fd, uint32_t src, uint32_t dst, int len)
> int i;
> BUILD_EXEC;
>
> + gem_require_mmap_gtt(fd);
> +
> src_ptr = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_WRITE);
> dst_ptr = gem_mmap__gtt(fd, dst, OBJECT_SIZE, PROT_READ);
>
> @@ -309,6 +311,8 @@ int main(int argc, char **argv)
> for (count = 1; count <= 1<<17; count <<= 1) {
> struct timeval start, end;
>
> + gem_require_mmap_gtt(fd);
> +
> gettimeofday(&start, NULL);
> as_gtt_mmap(fd, src, dst, tmp, object_size, count);
> gettimeofday(&end, NULL);
> @@ -387,6 +391,8 @@ int main(int argc, char **argv)
> for (count = 1; count <= 1<<17; count <<= 1) {
> struct timeval start, end;
>
> + gem_require_mmap_gtt(fd);
> +
> gettimeofday(&start, NULL);
> as_gtt_mmap(fd, src, dst, tmp, object_size, count);
> gettimeofday(&end, NULL);
> diff --git a/tests/i915/gem_reloc_vs_gpu.c b/tests/i915/gem_reloc_vs_gpu.c
> index d421e434..e1475a1f 100644
> --- a/tests/i915/gem_reloc_vs_gpu.c
> +++ b/tests/i915/gem_reloc_vs_gpu.c
> @@ -159,17 +159,17 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
> */
> reloc[0].presumed_offset = -1;
>
> - handle_relocs = gem_create(fd, 4096);
> - gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
> - gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
> - PROT_READ | PROT_WRITE);
> -
> exec[1].handle = special_bo->handle;
> exec[1].relocation_count = 1;
> /* A newly mmap gtt bo will fault on first access. */
> - if (faulting_reloc)
> + if (faulting_reloc) {
> + handle_relocs = gem_create(fd, 4096);
> + gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
> + gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
> + PROT_READ | PROT_WRITE);
> +
> exec[1].relocs_ptr = to_user_pointer(gtt_relocs);
> - else
> + } else
> exec[1].relocs_ptr = to_user_pointer(reloc);
>
> execbuf.buffers_ptr = to_user_pointer(exec);
> @@ -180,7 +180,8 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
>
> gem_execbuf(fd, &execbuf);
>
> - gem_close(fd, handle_relocs);
> + if (faulting_reloc)
> + gem_close(fd, handle_relocs);
> }
>
> static igt_hang_t no_hang(int fd)
> @@ -201,8 +202,10 @@ static void do_test(int fd, bool faulting_reloc,
> uint32_t test;
> int i;
>
> - if (faulting_reloc)
> + if (faulting_reloc) {
> + gem_require_mmap_gtt(fd);
> igt_disable_prefault();
> + }
>
> act_size = 2048;
> dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size,
> diff --git a/tests/i915/gem_render_copy.c b/tests/i915/gem_render_copy.c
> index 8d62a0f4..5757c547 100644
> --- a/tests/i915/gem_render_copy.c
> +++ b/tests/i915/gem_render_copy.c
> @@ -572,6 +572,8 @@ static void test(data_t *data, uint32_t tiling, uint64_t ccs_modifier)
> int opt_dump_aub = igt_aub_dump_enabled();
> int num_src = ARRAY_SIZE(src);
>
> + gem_require_mmap_gtt(data->drm_fd);
> +
> /* no Yf before gen9 */
> if (intel_gen(data->devid) < 9)
> num_src--;
> diff --git a/tests/i915/gem_set_tiling_vs_gtt.c b/tests/i915/gem_set_tiling_vs_gtt.c
> index 2611ec55..210d5358 100644
> --- a/tests/i915/gem_set_tiling_vs_gtt.c
> +++ b/tests/i915/gem_set_tiling_vs_gtt.c
> @@ -60,6 +60,8 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
> +
mmap_gtt depends on gen or not? Did we have mmap_gtt on Gen2? There are no silly
questions :)
> if (IS_GEN2(intel_get_drm_devid(fd)))
> tile_height = 16;
> else
> diff --git a/tests/i915/gem_set_tiling_vs_pwrite.c b/tests/i915/gem_set_tiling_vs_pwrite.c
> index f0126b64..d82e20b4 100644
> --- a/tests/i915/gem_set_tiling_vs_pwrite.c
> +++ b/tests/i915/gem_set_tiling_vs_pwrite.c
> @@ -58,6 +58,8 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
> +
> for (i = 0; i < OBJECT_SIZE/4; i++)
> data[i] = i;
>
> diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
> index f71a1fcb..e97e0981 100644
> --- a/tests/i915/gem_shrink.c
> +++ b/tests/i915/gem_shrink.c
> @@ -396,6 +396,8 @@ igt_main
> uint64_t alloc_size = 0;
> int num_processes = 0;
>
> + bool has_gtt = false;
> +
> igt_skip_on_simulation();
>
> igt_fixture {
> @@ -427,6 +429,8 @@ igt_main
> engines[nengine++] = engine;
> igt_require(nengine);
>
> + has_gtt = gem_mmap__has_gtt(fd);
> +
> close(fd);
> }
>
> @@ -435,9 +439,13 @@ igt_main
>
> for(const struct test *t = tests; t->name; t++) {
> for(const struct mode *m = modes; m->suffix; m++) {
> - igt_subtest_f("%s%s", t->name, m->suffix)
> - run_test(num_processes, alloc_size,
> - t->func, m->flags);
> + igt_subtest_f("%s%s", t->name, m->suffix) {
> + if (t->func == mmap_gtt)
> + igt_require(has_gtt);
> +
> + run_test(num_processes, alloc_size,
> + t->func, m->flags);
> + }
> }
> }
> }
> diff --git a/tests/i915/gem_storedw_loop.c b/tests/i915/gem_storedw_loop.c
> index b00555e0..d16a1a6b 100644
> --- a/tests/i915/gem_storedw_loop.c
> +++ b/tests/i915/gem_storedw_loop.c
> @@ -49,6 +49,12 @@ static int devid;
>
> static unsigned coherent_domain;
>
> +static bool
> +uses_coherent_gtt(int fd)
> +{
> + return (!gem_has_llc(fd) || gem_mmap__has_wc(fd));
> +}
> +
> static void *
> mmap_coherent(int fd, uint32_t handle, int size)
> {
> @@ -164,6 +170,9 @@ check_test_requirements(int fd, int ringid)
> {
> gem_require_ring(fd, ringid);
> igt_require(gem_can_store_dword(fd, ringid));
> +
> + if (uses_coherent_gtt(fd))
> + gem_require_mmap_gtt(fd);
> }
>
> igt_main
> diff --git a/tests/i915/gem_streaming_writes.c b/tests/i915/gem_streaming_writes.c
> index e83d69de..159cb7a6 100644
> --- a/tests/i915/gem_streaming_writes.c
> +++ b/tests/i915/gem_streaming_writes.c
> @@ -48,6 +48,8 @@
>
> #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
>
> +#define NEEDS_GTT(mode) (mode == 1)
> +
> IGT_TEST_DESCRIPTION("Test of streaming writes into active GPU sources");
>
> #define SRC 0
> @@ -75,6 +77,9 @@ static void test_streaming(int fd, int mode, int sync)
> } *batch;
> int i, n;
>
> + if (NEEDS_GTT(mode))
> + gem_require_mmap_gtt(fd);
> +
> memset(exec, 0, sizeof(exec));
> exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
> exec[DST].handle = gem_create(fd, OBJECT_SIZE);
> @@ -245,6 +250,9 @@ static void test_batch(int fd, int mode, int reverse)
> uint32_t *base;
> uint32_t offset;
>
> + if (NEEDS_GTT(mode))
> + gem_require_mmap_gtt(fd);
> +
> memset(exec, 0, sizeof(exec));
> exec[DST].handle = gem_create(fd, OBJECT_SIZE);
> exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
> @@ -389,14 +397,18 @@ igt_main
>
> igt_subtest("batch-cpu")
> test_batch(fd, 0, 0);
> - igt_subtest("batch-gtt")
> + igt_subtest("batch-gtt") {
> + gem_require_mmap_gtt(fd);
> test_batch(fd, 1, 0);
> + }
> igt_subtest("batch-wc")
> test_batch(fd, 2, 0);
> igt_subtest("batch-reverse-cpu")
> test_batch(fd, 0, 1);
> - igt_subtest("batch-reverse-gtt")
> + igt_subtest("batch-reverse-gtt") {
> + gem_require_mmap_gtt(fd);
> test_batch(fd, 1, 1);
> + }
> igt_subtest("batch-reverse-wc")
> test_batch(fd, 2, 1);
>
> diff --git a/tests/i915/gem_tiled_fence_blits.c b/tests/i915/gem_tiled_fence_blits.c
> index aacd42b7..249456e8 100644
> --- a/tests/i915/gem_tiled_fence_blits.c
> +++ b/tests/i915/gem_tiled_fence_blits.c
> @@ -213,6 +213,7 @@ igt_main
> igt_fixture {
> fd = drm_open_driver(DRIVER_INTEL);
> igt_require_gem(fd);
> + gem_require_mmap_gtt(fd);
> }
>
> igt_subtest("basic")
> diff --git a/tests/i915/gem_tiled_pread_basic.c b/tests/i915/gem_tiled_pread_basic.c
> index 1ac9eccd..b5a4e348 100644
> --- a/tests/i915/gem_tiled_pread_basic.c
> +++ b/tests/i915/gem_tiled_pread_basic.c
> @@ -124,6 +124,7 @@ igt_simple_main
> uint32_t devid;
>
> fd = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd);
>
> handle = create_bo(fd);
> igt_require(gem_get_tiling(fd, handle, &tiling, &swizzle));
> diff --git a/tests/i915/gem_tiled_pread_pwrite.c b/tests/i915/gem_tiled_pread_pwrite.c
> index 0988a4e8..0c0cde7f 100644
> --- a/tests/i915/gem_tiled_pread_pwrite.c
> +++ b/tests/i915/gem_tiled_pread_pwrite.c
> @@ -111,8 +111,10 @@ igt_simple_main
> uint32_t tiling, swizzle;
> int count;
> int fd;
> -
> +
> fd = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd);
> +
> count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ;
>
> for (int i = 0; i < count/2; i++) {
> diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
> index ddf2a748..29783aba 100644
> --- a/tests/i915/gem_tiled_swapping.c
> +++ b/tests/i915/gem_tiled_swapping.c
> @@ -175,6 +175,8 @@ igt_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
> +
> intel_purge_vm_caches(fd);
> check_memory_layout(fd);
>
> diff --git a/tests/i915/gem_tiled_wb.c b/tests/i915/gem_tiled_wb.c
> index b7f352fc..61aa1675 100644
> --- a/tests/i915/gem_tiled_wb.c
> +++ b/tests/i915/gem_tiled_wb.c
> @@ -140,6 +140,8 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(fd);
> +
> handle = create_bo(fd);
> get_tiling(fd, handle, &tiling, &swizzle);
>
> diff --git a/tests/i915/gem_tiled_wc.c b/tests/i915/gem_tiled_wc.c
> index 845ec228..86e9bf46 100644
> --- a/tests/i915/gem_tiled_wc.c
> +++ b/tests/i915/gem_tiled_wc.c
> @@ -113,6 +113,7 @@ igt_simple_main
> uint32_t handle;
>
> fd = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd);
> gem_require_mmap_wc(fd);
>
> handle = create_bo(fd);
> diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
> index a6f97a91..b5dc053d 100644
> --- a/tests/i915/gem_tiling_max_stride.c
> +++ b/tests/i915/gem_tiling_max_stride.c
> @@ -70,8 +70,9 @@ igt_simple_main
>
> fd = drm_open_driver(DRIVER_INTEL);
>
> - devid = intel_get_drm_devid(fd);
> + gem_require_mmap_wc(fd);
>
> + devid = intel_get_drm_devid(fd);
> if (intel_gen(devid) >= 7)
> stride = 256 * 1024;
> else if (intel_gen(devid) >= 4)
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index 8f8ddf43..9962e539 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -554,6 +554,8 @@ static int test_invalid_gtt_mapping(int fd)
> uint32_t handle;
> char *gtt, *map;
>
> + gem_require_mmap_gtt(fd);
> +
> /* Anonymous mapping to find a hole */
> map = mmap(NULL, sizeof(linear) + 2 * PAGE_SIZE,
> PROT_READ | PROT_WRITE,
> @@ -616,8 +618,10 @@ static int test_invalid_gtt_mapping(int fd)
> #define PE_BUSY 0x2
> static void test_process_exit(int fd, int flags)
> {
> - if (flags & PE_GTT_MAP)
> + if (flags & PE_GTT_MAP) {
> igt_require(gem_has_llc(fd));
> + gem_require_mmap_gtt(fd);
> + }
>
> igt_fork(child, 1) {
> uint32_t handle;
> @@ -700,6 +704,8 @@ static int test_map_fixed_invalidate(int fd, uint32_t flags)
> uint32_t handle[num_handles];
> uint32_t *ptr;
>
> + gem_require_mmap_gtt(fd);
> +
> ptr = mmap(NULL, ptr_size,
> PROT_READ | PROT_WRITE,
> MAP_SHARED | MAP_ANONYMOUS,
> @@ -944,6 +950,7 @@ static int test_dmabuf(void)
> int ret;
>
> fd1 = drm_open_driver(DRIVER_INTEL);
> + gem_require_mmap_gtt(fd1);
>
> handle = create_userptr_bo(fd1, sizeof(linear));
> memset(get_handle_ptr(handle), counter, sizeof(linear));
> @@ -1212,6 +1219,7 @@ static void test_readonly_mmap(int i915)
> */
>
> igt_require(igt_setup_clflush());
> + gem_require_mmap_gtt(i915);
>
> sz = 16 << 12;
> pages = mmap(NULL, sz, PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
> diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
> index 18adaf6b..97b57ca2 100644
> --- a/tests/i915/i915_pm_rpm.c
> +++ b/tests/i915/i915_pm_rpm.c
> @@ -1006,6 +1006,7 @@ static void gem_mmap_subtest(bool gtt_mmap)
> handle = gem_create(drm_fd, buf_size);
>
> if (gtt_mmap) {
> + gem_require_mmap_gtt(drm_fd);
> gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size,
> PROT_READ | PROT_WRITE);
> }
> @@ -1368,6 +1369,8 @@ static void gem_evict_pwrite_subtest(void)
> unsigned int num_trash_bos, n;
> uint32_t buf;
>
> + gem_require_mmap_gtt(drm_fd);
> +
> num_trash_bos = gem_mappable_aperture_size(drm_fd) / (1024*1024) + 1;
> trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
> igt_assert(trash_bos);
> @@ -1532,6 +1535,7 @@ static void cursor_subtest(bool dpms)
>
> disable_all_screens_and_wait(&ms_data);
>
> + gem_require_mmap_gtt(drm_fd);
> igt_require(default_mode_params);
> crtc_id = default_mode_params->crtc_id;
>
> @@ -1649,6 +1653,7 @@ static void test_one_plane(bool dpms, uint32_t plane_id,
> int32_t crtc_x = 0, crtc_y = 0;
> uint64_t tiling;
>
> + gem_require_mmap_gtt(drm_fd);
> disable_all_screens_and_wait(&ms_data);
>
> crtc_id = default_mode_params->crtc_id;
> @@ -1796,6 +1801,8 @@ static void pm_test_tiling(void)
> /* default stride value */
> uint32_t stride = 512;
>
> + gem_require_mmap_gtt(drm_fd);
> +
> /* calculate how many objects we can map */
> for (i = 1 << off_bit; i <= gtt_obj_max_size; i <<= 1, max_gem_objs++)
> ;
> @@ -1850,6 +1857,7 @@ static void pm_test_caching(void)
> I915_CACHING_DISPLAY, /* eDRAM caching */
> };
>
> + gem_require_mmap_gtt(drm_fd);
> disable_all_screens(&ms_data);
>
> handle = gem_create(drm_fd, gtt_obj_max_size);
> @@ -1887,6 +1895,7 @@ static void fences_subtest(bool dpms)
>
> disable_all_screens_and_wait(&ms_data);
>
> + igt_require(gem_available_fences(drm_fd));
Is this function from lib/ioctl_wrappers.h? Why you added it here?
Btw - this function has a comment that is valid for pre-gen4/
> igt_require(default_mode_params);
> params.crtc_id = default_mode_params->crtc_id;
> params.connector_id = default_mode_params->connector_id;
> diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
> index 17c68cc1..09cf5542 100644
> --- a/tests/i915/i915_suspend.c
> +++ b/tests/i915/i915_suspend.c
> @@ -50,6 +50,8 @@ test_fence_restore(int fd, bool tiled2untiled, bool hibernate)
> uint32_t *ptr1, *ptr2, *ptr_tiled;
> int i;
>
> + igt_require(gem_available_fences(fd));
> +
> /* We wall the tiled object with untiled canary objects to make sure
> * that we detect tile leaking in both directions. */
> handle1 = gem_create(fd, OBJECT_SIZE);
> diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
> index ea14db9a..1a2e2d4f 100644
> --- a/tests/kms_draw_crc.c
> +++ b/tests/kms_draw_crc.c
> @@ -329,13 +329,17 @@ igt_main
> igt_subtest_f("draw-method-%s-%s-%s",
> format_str(format_idx),
> igt_draw_get_method_name(method),
> - tiling_str(tiling_idx))
> + tiling_str(tiling_idx)) {
> + gem_require_mmap_gtt(drm_fd);
> draw_method_subtest(method, format_idx,
> tilings[tiling_idx]);
> + }
> } } }
>
> - igt_subtest("fill-fb")
> + igt_subtest("fill-fb") {
> + gem_require_mmap_gtt(drm_fd);
> fill_fb_subtest();
> + }
>
> igt_fixture
> teardown_environment();
> diff --git a/tests/kms_fence_pin_leak.c b/tests/kms_fence_pin_leak.c
> index 62c52b62..ac0f605c 100644
> --- a/tests/kms_fence_pin_leak.c
> +++ b/tests/kms_fence_pin_leak.c
> @@ -202,6 +202,8 @@ igt_simple_main
>
> data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
>
> + gem_require_mmap_gtt(data.drm_fd);
> +
> data.devid = intel_get_drm_devid(data.drm_fd);
>
> kmstest_set_vt_graphics_mode();
> diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
> index 4d15ce1c..78299438 100644
> --- a/tests/kms_frontbuffer_tracking.c
> +++ b/tests/kms_frontbuffer_tracking.c
> @@ -1758,6 +1758,9 @@ static void check_test_requirements(const struct test_mode *t)
>
> if (opt.only_pipes != PIPE_COUNT)
> igt_require(t->pipes == opt.only_pipes);
> +
> + if (t->method == IGT_DRAW_MMAP_GTT)
> + gem_require_mmap_gtt(drm.fd);
> }
>
> static void set_crtc_fbs(const struct test_mode *t)
> diff --git a/tests/kms_psr.c b/tests/kms_psr.c
> index 3e16a6bf..66f4fcd8 100644
> --- a/tests/kms_psr.c
> +++ b/tests/kms_psr.c
> @@ -41,6 +41,8 @@ enum operations {
> PLANE_ONOFF,
> };
>
> +#define needs_gtt(op) if (op == MMAP_GTT) {gem_require_mmap_gtt(data.drm_fd);}
> +
> static const char *op_str(enum operations op)
> {
> static const char * const name[] = {
> @@ -474,6 +476,7 @@ int main(int argc, char *argv[])
> igt_subtest_f("%sprimary_%s",
> append_subtest_name[data.op_psr_mode],
> op_str(op)) {
> + needs_gtt(op);
> data.op = op;
> data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
> test_setup(&data);
> @@ -486,6 +489,7 @@ int main(int argc, char *argv[])
> igt_subtest_f("%ssprite_%s",
> append_subtest_name[data.op_psr_mode],
> op_str(op)) {
> + needs_gtt(op);
> data.op = op;
> data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
> test_setup(&data);
> diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
> index 06a66cab..33f97b84 100644
> --- a/tests/prime_mmap.c
> +++ b/tests/prime_mmap.c
> @@ -79,6 +79,8 @@ test_correct(void)
> char *ptr1, *ptr2;
> uint32_t handle;
>
> + gem_require_mmap_gtt(fd);
> +
> handle = gem_create(fd, BO_SIZE);
> fill_bo(handle, BO_SIZE);
>
> diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
> index 04b15ddd..9c344df9 100644
> --- a/tests/prime_mmap_coherency.c
> +++ b/tests/prime_mmap_coherency.c
> @@ -295,6 +295,7 @@ int main(int argc, char **argv)
> * reproducing boils down to trial and error to hit different scenarios.
> * TODO: We may want to improve tests a bit by picking random subranges. */
> igt_subtest("read") {
> + gem_require_mmap_gtt(fd);
> igt_until_timeout(5) {
> int stale = test_read_flush();
> igt_fail_on_f(stale,
> diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> index 60bb951c..0c60d569 100644
> --- a/tests/prime_vgem.c
> +++ b/tests/prime_vgem.c
> @@ -125,6 +125,8 @@ static void test_fence_mmap(int i915, int vgem)
> int dmabuf, i;
> int master[2], slave[2];
>
> + gem_require_mmap_gtt(i915);
> +
> igt_assert(pipe(master) == 0);
> igt_assert(pipe(slave) == 0);
>
> @@ -207,6 +209,8 @@ static void test_gtt(int vgem, int i915)
> uint32_t *ptr;
> int dmabuf, i;
>
> + gem_require_mmap_gtt(i915);
> +
> scratch.width = 1024;
> scratch.height = 1024;
> scratch.bpp = 32;
> @@ -282,6 +286,7 @@ static void test_gtt_interleaved(int vgem, int i915)
> uint32_t *ptr, *gtt;
> int dmabuf, i;
>
> + gem_require_mmap_gtt(i915);
> igt_require(is_coherent(i915));
>
> scratch.width = 1024;
> --
> 2.20.1
>
Almost 1000 lines, huge patch, but I made it here :)
I hope I did not miss anything.
Kasia :)
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