[igt-dev] [PATCH i-g-t] tests/prime_busy: Increase timeout to mind pre-silicon.

[Tomasz Lis]

From: "Lis, Tomasz" <tomasz.lis at intel.com>

On silicon, simple submission is finished much faster than in a second.
But for pre-silicon, it is not always the case. Six seconds should be
enough though.

Signed-off-by: Tomasz Lis <tomasz.lis at intel.com>
Cc: Mrzyglod Daniel T <daniel.t.mrzyglod at intel.com>
Cc: Michal Winiarski <michal.winiarski at intel.com>
Cc: Katarzyna Dec <katarzyna.dec at intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
---
 tests/prime_busy.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/prime_busy.c b/tests/prime_busy.c
index a82acbdb..8e0f3ca6 100644
--- a/tests/prime_busy.c
+++ b/tests/prime_busy.c
@@ -147,7 +147,7 @@ static void busy(int fd, unsigned ring, unsigned flags)
 	if ((flags & HANG) == 0) {
 		*bbe = MI_BATCH_BUFFER_END;
 		__sync_synchronize();
-		timeout = 1;
+		timeout = 6;
 	}
 
 	/* Calling busy in a loop should be enough to flush the rendering */
-- 
2.14.1