[igt-dev] [PATCH i-g-t 09/10] lib/i915: add mmio base for engines

[Chris Wilson]

Quoting Lionel Landwerlin (2019-11-20 21:21:42)
> Useful when you want to work with MI_ALU and general purpose registers
> local to an engine.
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> ---
>  lib/i915/gem_engine_topology.c | 74 ++++++++++++++++++++++++++++++++++
>  lib/i915/gem_engine_topology.h |  5 +++
>  2 files changed, 79 insertions(+)
> 
> diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
> index 790d455f..925fdb51 100644
> --- a/lib/i915/gem_engine_topology.c
> +++ b/lib/i915/gem_engine_topology.c
> @@ -22,6 +22,7 @@
>   */
>  
>  #include "drmtest.h"
> +#include "intel_chipset.h"
>  #include "ioctl_wrappers.h"
>  
>  #include "i915/gem_engine_topology.h"
> @@ -337,3 +338,76 @@ bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
>  {
>         return e1->class == e2->class && e1->instance == e2->instance;
>  }
> +
> +uint32_t intel_get_engine_mmio_base(const uint16_t devid,
> +                                   const struct intel_execution_engine2 *e)
> +{
> +       switch (e->class) {
> +       case I915_ENGINE_CLASS_RENDER:
> +               return 0x2000;
> +       case I915_ENGINE_CLASS_COPY:
> +               return 0x22000;
> +       case I915_ENGINE_CLASS_VIDEO: {
> +               uint32_t gen11_bases[] = {
> +                       0x1c0000,

Physical layout is not possible to determine from class/inst nor legacy
I915_EXEC_RING.

https://patchwork.freedesktop.org/patch/340599/?series=69401&rev=1
-Chris