[igt-dev] [PATCH i-g-t] tests/i915/i915_pm_dc: Check runtime suspend for DC9 test

[Thasleem, Mohammed]

As for MTL DC5 counter is not expected to get reset in DC9 state.
Add condition to check runtime_suspended_time value for both
igfx and dgfx to track DC9 dpms entry.

Signed-off-by: Thasleem, Mohammed <mohammed.thasleem at intel.com>
---
 tests/i915/i915_pm_dc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/i915/i915_pm_dc.c b/tests/i915/i915_pm_dc.c
index 90fe847fc..13ae31583 100644
--- a/tests/i915/i915_pm_dc.c
+++ b/tests/i915/i915_pm_dc.c
@@ -88,7 +88,7 @@
 #define KMS_HELPER "/sys/module/drm_kms_helper/parameters/"
 #define PACKAGE_CSTATE_PATH  "pmc_core/package_cstate_show"
 #define KMS_POLL_DISABLE 0
-#define DC9_RESETS_DC_COUNTERS(devid) (!(IS_DG1(devid) || IS_DG2(devid)))
+#define DC9_RESETS_DC_COUNTERS(devid) (!(IS_DG1(devid) || IS_DG2(devid) || IS_METEORLAKE(devid)))
 
 IGT_TEST_DESCRIPTION("Tests to validate display power DC states.");
 
@@ -514,7 +514,7 @@ static bool dc9_wait_entry(data_t *data, int dc_target, int prev_dc, int prev_rp
 	 * Runtime suspended residency should increment once DC9 is achieved;
 	 * this condition is valid for all platforms.
 	 * However, resetting of dc5/dc6 counter to check if display engine was in DC9;
-	 * this condition at present can be skipped for dg1 and dg2 platforms.
+	 * this condition at present can be skipped for dg1, dg2 and MTL platforms.
 	 */
 	return igt_wait((read_runtime_suspended_time(data->drm_fd) > prev_rpm) &&
 			(!DC9_RESETS_DC_COUNTERS(data->devid) ||
-- 
2.34.1