[PATCH] [i-g-t] tests/amdgpu/amd_ilr: Fix psr eDP crc read timeout

Pillai, Aurabindo Aurabindo.Pillai at amd.com
Wed Jan 31 19:53:10 UTC 2024


[AMD Official Use Only - General]

Reviewed-by: Aurabindo Pillai <aurabindo.pillai at amd.com>

--

Regards,
Jay
________________________________
From: Hersen Wu <hersenxs.wu at amd.com>
Sent: Wednesday, January 31, 2024 2:43 PM
To: igt-dev at lists.freedesktop.org <igt-dev at lists.freedesktop.org>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Pillai, Aurabindo <Aurabindo.Pillai at amd.com>; Hung, Alex <Alex.Hung at amd.com>; Mahfooz, Hamza <Hamza.Mahfooz at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>
Cc: markyacoub at google.com <markyacoub at google.com>; Wu, Hersen <hersenxs.wu at amd.com>
Subject: [PATCH] [i-g-t] tests/amdgpu/amd_ilr: Fix psr eDP crc read timeout

Disable eDP psr via debugfs disallow_edp_enter_psr
before IGT reads crc.

With set_all_output_pipe_to_none within test_init,
Tx writes dpcd 0x600=2. eDP rx is power down.
Rx dpcd 0x170 is reset to 0 by Rx. eDP psr and crc
check for rx internal logic are disabled. With
disallow_edP_enter_psr = true, IGT sets test patterns,
then igt_display_commit_atomic, kernel driver will
turn on edp. Rx FW set dpcd 0x170 = 0 (default value).
Therefore, IGT could read rx crc successfully.

Signed-off-by: Hersen Wu <hersenxs.wu at amd.com>
---
 tests/amdgpu/amd_ilr.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
index b2c0f294d..46ad6f60a 100644
--- a/tests/amdgpu/amd_ilr.c
+++ b/tests/amdgpu/amd_ilr.c
@@ -205,11 +205,22 @@ static void test_flow(data_t *data, enum sub_test option)
                         continue;
                 }

+               /* igt_amd_output_has_ilr_setting only checks if debugfs
+                * exist. ilr settings could be all 0s -- not supported.
+                * IGT needs to check if ilr settings values are supported.
+                */
+               igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr);
+               if (data->supported_ilr[0] == 0)
+                       continue;
+
                 igt_info("Testing on output: %s\n", output->name);

                 /* Init only if display supports ilr link settings */
                 test_init(data, output);

+               /* Disable eDP PSR to avoid timeout when reading CRC */
+               igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, true);
+
                 mode = igt_output_get_mode(output);
                 igt_assert(mode);

@@ -243,6 +254,9 @@ static void test_flow(data_t *data, enum sub_test option)
                 igt_remove_fb(data->drm_fd, &data->fb);

                 test_fini(data);
+
+               /* Enable eDP PSR */
+               igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false);
         }

 }
--
2.25.1

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