[PATCH v3 15/19] lib/amdgpu: use a memory fence to serialize write
Sunil Khatri
sunil.khatri at amd.com
Fri Mar 28 08:24:12 UTC 2025
Use a memory fence to serialize all the writes in the
queue before updating wptr and ringing the doorbell
This ensures memory is written in same sequence as
intended to.
Signed-off-by: Sunil Khatri <sunil.khatri at amd.com>
---
lib/amdgpu/amd_user_queue.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/lib/amdgpu/amd_user_queue.c b/lib/amdgpu/amd_user_queue.c
index d1763f5d6..0235b07ac 100644
--- a/lib/amdgpu/amd_user_queue.c
+++ b/lib/amdgpu/amd_user_queue.c
@@ -148,8 +148,17 @@ void amdgpu_user_queue_submit(amdgpu_device_handle device, struct amdgpu_ring_co
/* empty dword is needed for fence signal pm4 */
amdgpu_pkt_add_dw(0);
+#if DETECT_CC_GCC && (DETECT_ARCH_X86 || DETECT_ARCH_X86_64)
+ asm volatile ("mfence" : : : "memory");
+#endif
+
+ /* Below call update the wptr address so will wait till all writes are completed */
amdgpu_pkt_end();
+#if DETECT_CC_GCC && (DETECT_ARCH_X86 || DETECT_ARCH_X86_64)
+ asm volatile ("mfence" : : : "memory");
+#endif
+
/* Update the door bell */
ring_context->doorbell_cpu[DOORBELL_INDEX] = *ring_context->wptr_cpu;
--
2.43.0
More information about the igt-dev
mailing list