[Bug 92760] Add FP64 support to the i965 shader backends

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Mon Nov 30 08:05:01 PST 2015


https://bugs.freedesktop.org/show_bug.cgi?id=92760

--- Comment #15 from Connor Abbott <cwabbott0 at gmail.com> ---
Hey, since you posted a link to a branch with some updated patches, I noticed a
few things:

1. Your patch " i965/fs: Fix register regioning for fp64" isn't correct. In
particular, it's not correct that "The size of the type is irrelevant, since we
manipulate DF as F with stride 2." The stride of a register is in units of the
typesize, and we don't "manipulate DF as F with stride 2" anywhere at all in
the backend (you can check for yourself!), so we need to take the type size
into account when figuring out if the source crosses a SIMD8 register boundary.
I suspect this is just papering over bugs due to reverting "XXX remove exec
size hack" -- the right thing to do would be to fix the exec_size of any
instructions we create that would otherwise hit this hack so we can remove it.
The other possibility I can think of is that the crashes are due to Matt's
regioning validation falling over, in which case you'll need to fix that. In
any case, as-is you're going to produce a region of <8,8,1> for doubles which
is incorrect -- you want a region of <4,4,1> since only the vertical stride can
cross the SIMD8 register boundary, which my original i965-fp64-v3 branch does
correctly.

2. "i965/fs: fix ceil/floor for doubles" -- sorry, you're not going to get off
that easily :) You can't use floats here, since you're going to run into range
and precision issues. If the piglit tests don't test for those, then they need
to be fixed. Since we don't have HW support for ceil/floor/trunc/etc., you're
going to need to implement them using integer operations. I was planning on
doing this in nir_lower_double_ops.c. I think trunc is the easiest to implement
using integer ops -- you don't need to worry about the sign, you just have to
mask off the appropriate number of bits in the mantissa based on the exponent
-- but the rub is that 64-bit integer arithmetic isn't implemented yet in NIR
or the backend, and it doesn't even exist prior to Broadwell, so you have to
split the double into 32-bit chunks and operate on those. Then once you've
implemented trunc, you can implement all the other missing operations in terms 
of it. Have fun :)

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/intel-3d-bugs/attachments/20151130/1690bbf5/attachment.html>


More information about the intel-3d-bugs mailing list