[Bug 107212] Dual-Core CPU E5500 / G45: RetroArch with reicast core results in corrupted graphics

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Sat Jul 28 08:48:42 UTC 2018


https://bugs.freedesktop.org/show_bug.cgi?id=107212

--- Comment #36 from Diego Viola <diego.viola at gmail.com> ---
[diego at dualcore mesa]$ git bisect bad
8aee87fe4cce0a883867df3546db0e0a36908086 is the first bad commit
commit 8aee87fe4cce0a883867df3546db0e0a36908086
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Feb 20 14:09:17 2015 -0800

    i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.

    Gen5+ systems allow you to specify multiple shader programs - both SIMD8
    and SIMD16 - and the hardware will automatically dispatch to the most
    appropriate one, given the number of subspans to be processed.

    However, that is not the case on Gen4.  Instead, you program a single
    shader.  If you enable multiple dispatch modes (SIMD8 and SIMD16), the
    shader is supposed to contain a series of jump instructions at the
    beginning.  The hardware will launch the shader at a small offset,
    hitting one of the jumps.

    We've always thought that sounds like a pain, and weren't clear how it
    affected performance - is it worth having multiple shader types?  So,
    we never bothered with SIMD16 until now.

    This patch takes a simpler approach: try and compile a SIMD16 shader.
    If possible, set the no_8 flag, telling the hardware to just use the
    SIMD16 variant all the time.

    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

:040000 040000 a0bac15a1f0b79b629c912cdcee2265f8a968d81
45a6b6fb2fd15aab6b877277ecee33b41cad2ef4 M      src
[diego at dualcore mesa]$

-- 
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/intel-3d-bugs/attachments/20180728/242d81e3/attachment.html>


More information about the intel-3d-bugs mailing list