[Bug 107510] [GEN8+] up to 10% perf drop on several 3D benchmarks

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Thu Nov 1 14:00:06 UTC 2018


--- Comment #16 from Eero Tamminen <eero.t.tamminen at intel.com> ---
(In reply to Timothy Arceri from comment #15)
> Splitting and/or vectorising FS inputs seems to case the scheduler to vary
> wildly. I'm seeing up to +/-50% swings in cycle counts in both directions.

I don't trust scheduler cycle counts much for shaders doing sampling.

Texture fetches have most impact on perf/cycles, but when I last looked at
* Cycle counts are obviously wrong for SIMD32 (when comparing reported cycle
changes to the actual perf change), so I don't think it takes latency
compensation from threading properly into account
* I'm not sure how well it takes cache impact for texture fetches into account
either (on average first fetch for given sampler takes more cycles than
successive ones, and grouping few fetches to same sampler together and
distancing such groups from each other, uses less cycles as that minimizes
cache trashing.  Windows driver produced shader assembly looks on average
noticeably better in this respect than i965 produced assembly)

> I'm not sure what to do about this.

IMHO i965 instruction scheduler cycle accounting and texture fetch scheduling
would need to be improved.  Not sure who can do that though.

I think that for this bug, your patch is enough though.

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