[Bug 85327] [HSW] GPU hang on HSW Celeron when doing 16 VA-API decodes and compositing

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https://bugs.freedesktop.org/show_bug.cgi?id=85327

--- Comment #5 from Simon Farnsworth <simon at farnz.org.uk> ---
Created attachment 108234
  --> https://bugs.freedesktop.org/attachment.cgi?id=108234&action=edit
Error state after patch from comment #3 is applied

No luck with that patch - it appears to simply move the deckchairs around
again. New error state attached.

I note from the OSRC PRMs that your patch strictly speaking asks the GPU to do
something that's claimed as not supported - you set DW1 bit 20 (CS stall), but
not one of the 5 bits the OSRC PRMs claim you must also set (at least one of
DW1 bits 12, 0, 1, 13 or 15:14 must be set).

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