[Bug 100899] Enable UMD to control GPGPU EUs slice number in static/dynamic way

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=100899

--- Comment #3 from Oscar Mateo <oscar.mateo at intel.com> ---
Hi Chris,

Userspace could adjust it via LRI, if only i915 whitelists GEN8_R_PWR_CLK_STATE
(this configuration from userspace via LRI is the preferred way for newer
platforms, and I was suggesting Dmitry the same thing could be done from BDW
onwards).

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