[Bug 101691] gfx corruption on windowed 3d-apps running on dGPU

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=101691

--- Comment #46 from Alex_Zhang1 at Dell.com ---
(In reply to Ben Widawsky from comment #44)
> There is no special handling for how the GPU maps dma-buf imported objects.
> In other words, it will default to LLC caching on KBL.
> 
> Provided amdgpu is flushing its contents properly though, the LLC should
> just follow normal coherency snoop protocol and i915 should see the changed
> data.

Hi Ben,
  By review intel gem code, I found there are 4 cache level,
I915_CACHE_NONE,LLC,L3_LLC,WT, if we chose NONE when create buffer, does that
mean every operation and operate result(including whole render process and the
output)relating to the buffer has nothing to do with cache policy?
  I want to check this because I want to prove this issue do relating to cache
policy. I have checked the SNA power state flag, what this flag effects is just
the path flow to treat buffer in user space, and I personally believe cache
level is configured by user, upper layer of sna_accel user space driver(please
correct me if I am wrong).
  When plug AC, /sys/class/power_supply/AC/online change from 0 to 1, this
event will captured by SNA module, once it is captured, it will change power
state, means sna->flags being changed, then buffer handle path been change, at
this moment, buffer has been created with proper cache policy from upper layer
user.
  Could you please help to answer the first question? If we can confirm this
has nothing to do with cache. If my way is wrong, would you please help to
suggest how to avoid cache influencing?
  May be I am wrong, I think this is just a user space driver issue, they might
miss some consideration on 5917 video card, since 5916 has no this issue.
  Thanks in advance.

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