[Bug 110394] Skylake GPU HANG while gstreamer H264 vaapi encoding from MJPEG vaapi decode on drm-tip

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=110394

--- Comment #38 from Chris Wilson <chris at chris-wilson.co.uk> ---
(In reply to Andy Nicholas from comment #32)
> This is the diff for the powergating test I'm running now. No other changes
> are made to the kernel, just this one patch:
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index eaf0793ebf60..29260ba32529 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8609,8 +8609,12 @@ static void intel_enable_rc6(struct drm_i915_private
> *dev_priv)
>                 cherryview_enable_rc6(dev_priv);
>         else if (IS_VALLEYVIEW(dev_priv))
>                 valleyview_enable_rc6(dev_priv);
> -       else if (INTEL_GEN(dev_priv) >= 9)
> -               gen9_enable_rc6(dev_priv);
> +       else if (INTEL_GEN(dev_priv) >= 9) {
> +               gen9_disable_rc6(dev_priv);
> +
> +               I915_WRITE(GEN9_PG_ENABLE,
> +                           GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
> +       }
>         else if (IS_BROADWELL(dev_priv))
>                 gen8_enable_rc6(dev_priv);
>         else if (INTEL_GEN(dev_priv) >= 6)
> 
> 
> Btw -
> 
> I did read through the gen9_enable_rc6() code and the "hysteresis" stuff
> jumped out at me. does anything bad happen if those calculations are not
> accurate?

It will just use whatever the default values were. The important point here is
that with RC6_CONTROL=0 and PG_ENABLE!=0, we see exactly the same hang as
before. That is at least a nudge back towards the powergating as being the
culprit.

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