[Bug 108536] [CI][SHARDS] igt at gem_ctx_isolation@rcs0-dirty-switch - fail - Failed assertion: num_errors == 0

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=108536

Chris Wilson <chris at chris-wilson.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |WORKSFORME
             Status|NEEDINFO                    |RESOLVED

--- Comment #4 from Chris Wilson <chris at chris-wilson.co.uk> ---
commit 478452fece3997dfacaa4d6babe6b8bf6fef784f (upstream/master,
origin/master, origin/HEAD)
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jan 7 12:35:27 2019 +0000

    i915/gem_ctx_isolation: Ignore the low bits of BB_OFFSET

    On Skylake, BB_OFFSET seems to be unstable. Since this is an
    offset into the batch at the time of CS execution, it should be actively
    written to as we read from the register so allow it a qword of
    discrepancy (since the CS should be reading in qwords). This still
    allows us to detect dirt across the rest of the register field, should
    that be required.

    v2: restrict ignore_bits to only BIT(2) that we see fluctuate in testing
    (Antonio)

    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
    Reviewed-by: Antonio Argenziano <antonio.argenziano at intel.com>

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