[PATCH v18 18/18] drm/i915: Keep plane size mult of 4 for NV12

Vidya Srinivas vidya.srinivas at intel.com
Thu Mar 29 05:16:27 UTC 2018


As per display WA 1106, to avoid corruption issues
NV12 plane height needs to be multiplier of 4
Hence we modify the fb src and destination height
and width to be multiples of 4. Without this, pipe
fifo underruns were seen on APL and KBL.

Credits-to: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas at intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h    | 2 ++
 drivers/gpu/drm/i915/intel_sprite.c | 8 ++++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9c58da0..a1f718d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -159,6 +159,8 @@
 #define INTEL_I2C_BUS_DVO 1
 #define INTEL_I2C_BUS_SDVO 2
 
+#define MULT4(x) ((x + 3) & ~0x03)
+
 /* these are outputs from the chip - integrated only
    external chips are via DVO or SDVO output */
 enum intel_output_type {
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 538d938..9f466c6 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -261,6 +261,14 @@ skl_update_plane(struct intel_plane *plane,
 	crtc_w--;
 	crtc_h--;
 
+	if (fb->format->format == DRM_FORMAT_NV12) {
+		src_w = MULT4(src_w);
+		src_h = MULT4(src_h);
+		crtc_w = MULT4(crtc_w);
+		crtc_h = MULT4(crtc_h);
+		DRM_ERROR("%d %d %d %d\n", src_w, src_h, crtc_w, crtc_h);
+	}
+
 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
 
 	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
-- 
2.7.4



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