[PATCH 6/6] wip: increase psr idle paterns

[José Roberto de Souza]

---
 drivers/gpu/drm/i915/display/intel_psr.c | 5 +++++
 drivers/gpu/drm/i915/i915_reg.h          | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 13218eaedd9a..a18536d9d2c1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -771,6 +771,11 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 
 		chicken |= VBLANK_UNMASKED_PSR;
 		I915_WRITE(reg, chicken);
+
+		/* Increase idle paterns */
+		chicken = I915_READ(PSR_DEBUG_A(cpu_transcoder));
+		chicken |= PSR_DEBUG_A_IDLE_COUNT_PSR;
+		I915_WRITE(PSR_DEBUG_A(cpu_transcoder), chicken);
 	}
 
 	/*
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b2e0e8c27969..175cb8e9f2f1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4487,6 +4487,11 @@ enum {
 #define PSR2_SU_STATUS_MASK(frame)	(0x3ff << PSR2_SU_STATUS_SHIFT(frame))
 #define PSR2_SU_STATUS_FRAMES		8
 
+#define _PSR_DEBUG_A_A			0x60A60
+#define _PSR_DEBUG_A_EDP		0x6FA60
+#define PSR_DEBUG_A(tran)		_MMIO_TRANS2(tran, _PSR_DEBUG_A_A)
+#define   PSR_DEBUG_A_IDLE_COUNT_PSR	(1 << 5)
+
 /* VGA port control */
 #define ADPA			_MMIO(0x61100)
 #define PCH_ADPA                _MMIO(0xe1100)
-- 
2.23.0